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the signal. Digital quantities on the other hand are represented by binary numbers (ONEs and ZEROs). The binary ONEs and ZEROs indicate the value at a particular instant in time. Each bit position represents a portion of the overall quantity. The summation of the value of the set bits (ONEs) is normally the quantity to be represented. By setting or clearing particular bit positions in the binary word, different values within a set of limits maybe expressed. ANALOG AND DIGITAL QUANTITY COMPARISONS Let’s compare an analog quantity and a digital quantity representing the same range of values, say from 1 to 31 miles. The analog signal will be a linear single-phase ac sine wave. The ac signal is variable between 2 volts and 34 volts peak to peak. An amplitude of 2 volts peak to peak will indicate O miles, the minimum limit value, and an amplitude of 34 volts will indicate a value of 31 miles, the maximum limit. In this example, the increasing signal amplitude indicates an increase in range in miles. The digital value will be expressed by five binary bits. Each bit position when set (a binary ONE) indicates a portion of the quantity. Bit 2 0 indicates a value of 1 mile, bit 2 1 a value of 2 miles, bit 2 2 a value of 4 miles, bit 2 3 a value of 8 miles, and bit 2 4 a value of 16 miles. Zero miles is indicated when all bits are clear (binary ZEROs). The maximum of 31 miles is indicated when all bits are set (binary ONEs), 31 miles being the sum of the value of all the set bits (1+2+4+8+16=31). Figure 13-1 shows the analog and digital representations of the same quantity through the range Figure 13-1.—Analog and digital quantity comparisons. 13-2
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of the values. At 0 miles, the analog signal is 2 volts peak to peak and the digital value is all ZEROS. For an indication of 5 miles, the analog signal increases to 7 volts peak to peak and the digital value now has bits 2 0 and 2 2 set. At 20 miles, the ac signal has increased to 22 volts peak to peak and bits 2 2 and 2 4 are set in the digital value. Finally when the maximum value is reached, the ac signal is 34 volts peak to peak and the digital value has all its bits set. You should be aware that the values we have covered are extremely limited compared to the capabilities of most analog and digital devices. Much greater accuracy and ranges are commonly encountered; however, the basic fundamentals you have just learned will apply. THE ANALOG-TO-DIGITAL CONVERTER An analog-to-digital converter is a device or component of a larger device that receives an analog signal and converts it into a digital quantity with a given accuracy and resolution. The analog signal input is compared to a given reference signal, and the difference between signals is used to compute the digital quantity indicated by the analog signal. The reference signal is normally equivalent to the maximum value of transmitted data: The basic analog-to-digital conversion process can be divided into a series of operations. Each operation performs a specific task in the conversion process. The analog-to-digital conversion operations are sampling, quantization, and encoding. Sampling Sampling is the first operation that takes place in an analog-to-digital conversion. Basically, the inputted analog signal is sampled or tested repeatedly over a period of time. This is done to determine the characteristic that contains the analog quantity, such as the signal’s amplitude. A constantly varying input must be sampled at a much higher frequency than its own to ensure the accuracy of the conversion. Figure 13-2 shows a pulsed sampling of an ac signal. For each sample taken, a voltage level is determined. By comparing the voltages detected by the sample pulses, the largest voltage would tend to indicate the peak and hence the amplitude of the input signal. A sampling is performed on an analog signal only when a conversion is required. Quantization Quantization takes the sampled analog value and converts it to the nearest binary value or quantity. The accuracy of a binary quantity is limited to the value of the least significant bit (2 0 ). In the example in figure 13-1, bit 2 0 was the 1 mile bit, meaning the smallest value that could be indicated was 1 mile and the greatest accuracy was plus or minus 1 mile. Smaller values of 1/2 or 1/4 miles or less could not be indicated. Quantization, in effect, rounds out the conversion to the value of the least significant bit (LSB). Encoding The encoding operation reduces the result of the conversion to a binary code acceptable to the digital equipments that use the data. There is a variety of coding systems in use. You have already been introduced to one of the most common ones, natural binary code. This binary code expresses quantities as a weighted sum. Each bit position represents a specified value when set. The sum of the values of the set bits defines the value of the quantity. The bit with Figure 13-2.—Sampling pulses. 13-3
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the greatest weight is the most significant bit (MSB). The bit with the least weight or representing the smallest value is the least significant bit (LSB). Natural binary code is used in a system of digital data transmission and conversion called binary angular measurement (BAM). Other coding systems such as Gray code and binary-coded decimal (BCD) are also used by analog-to-digital converters. BINARY ANGULAR MEASUREMENT. — Binary angular measurement words (BAMs) are standardized binary words used to transfer angular measurements between shipboard tactical data system equipments. BAM data words are used to transfer quantities between digital equipments, from digital equipments to D/A converters, or from A/D converters to digital equipments. BAM data words are specifically designed to indicate up to 360 degrees of angular values in binary form, often in steps or increments of as small as 0.009766 degree (the LSB value). Figure 13-3 shows one example of a BAM word. This 12-bit word (2°-2 11 ) can indicate 360 degrees of angle in steps of 0.088 degree. The LSB is equal to 0.088 degree when set (ONE), while the MSB is equal to 180 degrees when set. When all 12 bits are set, a maximum angle of 359.902 degrees is indicated. ZERO or 360 degrees is indicated when all bits in the BAM data word are clear (ZEROS). BAM words are also used to transmit non-angular values such as range or height. When non-angular values are being used, the LSB value indicates the smallest step or increment of the quantity being transmitted. The MSB value represents half the maximum value that may be transmitted. The sum of all bits when set indicates the maximum quantity that can be transmitted. This corresponds to the 0- to 360-degree capability of common shipboard synchro systems. GRAY CODE. —Gray code or reflected binary code is used in devices where a transition from one consecutive value to another takes place, such as angular measurement and encoding. The code is designed to change from one value to the next with only one bit change. Table 13-1 shows the relationships between Gray code, BCD, and natural binary code. BINARY-CODED DECIMAL (BCD). —BCD represents decimal values with a 4-bit code, called the 8-4-2-1 code. Each of the 4-bit groupings represents one decimal digit. BCD encoders allow for immediate decimal display of the converter output. They are found in such devices as digital voltmeters and other types of decimal display devices. Table 13-1 shows the relationships between BCD, Gray code, and natural binary code. SYNCHROS Up to this point, we have discussed basically single-phase analog data signals. One of the most common shipboard analog signals requiring conversion is the 3-phase or 5-wire synchro signal. Synchros are used throughout naval ships for the rapid transmission of analog information between equipments and stations. They are found in just about every weapon, communication, underwater detection, and navigation system in use in the Navy. Numerous kinds of information involving angular displacement or ranges of values are transmitted. For the combat direction system (CDS) equipments to use this information, the synchro signals must be converted to their digital equivalent. The following information provides a limited overview of synchros as they apply to digital systems and synchro-to-digital (S/D) conversion. Figure 13-3.—A 12-bit binary angular measurement (BAM) word. 13-4
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Table 13-1.—Comparison of Binary-Coded Decimal (BCD), Gray Code, and Natural Binary Code Synchro Systems The term synchro is an abbreviation of the word synchronous. It is the name given to a variety of rotary, electromechanical, position sensing devices. Synchro signals are used to transmit the angular position (0 to 360 degrees) of a rotor shaft in a synchro transmitter. When the signals are applied to one or more synchro receivers, the rotor shaft in each receiver is positioned to match the transmitter’s shaft position (figure 13-4). In this example, the receiver shaft in turn drives an indicator dial to display the transmitted information. The combination of synchro transmitter and receivers is called a synchro system. There are two major classifications of synchro systems: torque systems and control systems. Figure 13-4.—Torque synchro system transmitter and receivers. Torque systems provide torque or turning force to drive light loads such as indicator dials, pointers, or other mechanical outputs. Control synchro systems provide an electrical output used to control the power that performs mechanical work. The control synchro normally feeds a control transformer, not a control receiver. The control transformer output is fed to devices such as a servo system to control larger systems and devices. The synchro signals converted by CDS equipment may be either control synchro signals or torque synchro signals; however, control synchro signals are preferred because they are generally more accurate than torque synchro signals. OPERATING VOLTAGES AND FRE- QUENCIES. —Most shipboard synchro systems operate on a supply voltage of 115 volts ac at a frequency of 60 or 400 Hz. Synchros operating at 115 volts 400 Hz are generally more accurate than the 60-Hz synchros. Most newer weapon systems use 400-Hz synchros exclusively. SINGLE-SPEED, MULTISPEED, AND DUAL-SPEED SYNCHRO SYSTEMS. —The accuracy of the data to be transmitted is a factor in any synchro system. If the data covers a wide range of values, then the basic synchro system is unable to detect small changes in the data. When this happens, the accuracy of the system decreases. Multispeed synchro systems were developed to correct this deficiency. Multispeed synchro systems use more than one speed of data transmission. The speed of data transmission is the number of times the synchro transmitter rotor must turn 360 degrees to transmit a fuIl range of values. In a 1-speed system, one rotation of the transmitter rotor covers the full range of values. The 13-5
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rotor is geared to its mechanical input and one rotation of the input results in one revolution of the transmitter’s rotor. The speed of a synchro transmitter is tied to the gear ratio between the mechanical input to the transmitter and the transmitter’s rotor; that is, 1:1,36:1, and soon. In a 36-speed synchro system, the rotor of the synchro transmitter is geared to rotate 36 times for one revolution of the input shaft (36:1). Units transmitting data atone speed (1-speed, 36-speed, and so forth) are called single-speed synchros. The entire range of data to be transmitted is contained in the output of the single-synchro transmitter. It is quite common for shipboard synchro systems to transmit data using two different speed synchros with the same reference or supply voltage. For example, ship’s course (ownship’s heading) information is usually transmitted to other locations using a 1-speed synchro and a 36-speed synchro. A synchro system that transmits data using two different speed synchros is called a dual-speed synchro system or a double-speed synchro system. COARSE AND FINE DATA TRANSMIS- SION. —Dual-speed synchro transmissions are combined to improve the accuracy of the data transmitted. The use of two transmitting synchros allows for a coarse value and a fine value to be sent at the same time. The synchro with the lowest ratio (1:1) sends the coarse value. The synchro with the highest ratio (36:1) sends the fine value. The coarse and fine values transmitted can be likened to the hour and minute hands of a clock. The course value represents the time in hours. The fine value represents the time in minutes. The two values must be combined to give the time in hours and minutes. Let’s look at a coarse synchro and a fine synchro transmitting an angular position such as ship’s course (ownship’s heading), which can be from 0 degrees to 359 degrees true. The coarse synchro (1:1) indicates 360 degrees of ship’s course with one rotation. However, the accuracy of the data is limited to plus or minus 1 degree of heading. This degree of accuracy is not enough for most navigation systems to keep an accurate track of ship’s movement. The fine synchro (36:1) rotates 36 times for each rotation of the coarse synchro. This means the fine synchro rotates once each 10 degrees (360/36). Within its 10-degree segment, the fine synchro is 36 times as accurate as the coarse synchro. The use of dual-speed synchros requires two S/D conversions to take place; one to determine the position of the rotor in the coarse synchro transmitter and one to determine the position of the rotor in the fine synchro transmitter. SYNCHRO SIGNALS. —A single-speed synchro transmitter outputs three waveforms that indicate the angular position of the rotor in the transmitting synchro, for example a control transmitter (CX). Waveforms are induced in the stator coils by the magnetic field of the rotor coil. The two rotor connections of the CX (R1 and R2) are fed from a 115-volt ac supply voltage (also called the reference voltage). This voltage is also fed to the synchro-to-digital (S/D) converter circuitry. The reference voltage is important in the conversion process. It provides a reference for the S/D converter to use when sampling the stator voltages. The amplitude of the voltage output between the stators (S1 to S2, S1 to S3, and S2 to S3) at any instant is dependent on the position of the rotor in the CX. The 115-volt supply voltage induces an ac voltage into the stator windings. The phase relationship of the signals induced on each stator winding is dependent on the angular position of the rotor within the CX. The rotor can normally be rotated 360 degrees within the synchro. The range of values being transmitted is tied to this 360 degree rotation. The minimum value is normally transmitted with the rotor at the 0-degree position and the maximum value is sent when the rotor is positioned to approximately 359 degrees. All three stator signals are ac voltages that have the same characteristics (frequency and amplitude). They have a 120-degree phase difference (phase displacement) from each other due to the 120-degree separation of the wye windings of the stator coils in the synchro transmitter. At any instant, a phase relationship exists between the rotor supply (excitation) voltage and the three stator voltages. This phase relationship is the key to the S/D conversion process. Basically, the phase relationship of the individual stator voltages, across terminals S1, S2, and S3, varies with the rotor supply voltage (R1-R2) as the rotor is rotated within the synchro transmitter. Each position of the rotor has a unique stator voltage phase relationship to the supply (reference) voltage. At any instant, the amplitude and polarity of the stator signals when compared to the supply voltage indicate the angular position of the rotor. For dual-speed synchro systems, two sets of stator voltages are transmitted, one set for the coarse synchro and one set for the fine synchro. A single supply voltage (reference) is used for both synchro 13-6
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transmissions. In other words, both speeds are converted using the same reference signal. Synchro-to-Digital (S/D) Conversion Two methods are currently in use to convert synchro data to digital words (BAMs): the sector method and the octant method. Both methods of conversion require a reference voltage input for conversion to take place. SECTOR CONVERSION. —The sector conversion method uses the reference voltage to determine the time to sample the stator voltages for conversion to take place. The ideal time to sample the stator voltages is when the reference voltage is at or near the positive or the negative peak of its cycle. Sixty-Degree Sector Determination. —Once the negative or the positive peak of the reference is detected, the sector in which the rotor is positioned may be determined. There are six 60-degree sectors within the 360-degree rotation of the rotor. The relationship of the stator voltages to the reference defines the sector. Table 13-2 shows the sector limits and the phase relationship of the stator voltages to the reference in each sector. Stator Voltage Selection. —When the sector angle is determined, two of the three stator voltages are used to identify the ratio angle within the sector. The ratio angle is determined by a ratio between the two voltage samples. The two stator voltages selected depend on the sector. The appropriate voltages are gated to the conversion circuitry and converted to binary data. The sector angle and the ratio angle of the two stator voltages are summed to determine the binary angle of the rotor position in BAMs. Table 13-2.—Phase Relationship of Stator Voltages to Reference OCTANT CONVERSION. —The octant conversion method divides the 360 degrees of angular measurement into eight 45-degree octants. The conversion process first defines the octant and then the binary representation of the trigonometric angle within the octant. Octant Determination. —The 5-wire synchro signal (R1, R2, S1, S2, and S3) is first converted into two dc voltages representing the sine and cosine of the synchro angle. The polarity of the sine and cosine voltages and their respective amplitude to each other are used to select the octant that defines the three most significant bits of the BAM word (figure 13-3). Successive Approximations. —The remaining bits of the BAM word are determined through a process of successive approximations. The sine and cosine voltages are combined into a ratio voltage that is used to determine the condition of each of the remaining bit positions in the BAM word, starting at the MSB of the remaining bits. A trial and error method is used. A trial binary angle is generated and tested against the ratio angle until the trial angle equals the ratio angle, completing the conversion process. Single-Speed/Dual-Speed Synchro Conversions Synchro-to-digital conversions do not occur on a continuous basis. The synchro data is sampled as required by the controlling computer, usually on a periodic basis. A single BAM word is generated by the S/D conversion for both single- and dual-speed synchros. When dual-speed synchro data is being converted, two S/D conversions are required to generate one BAM word. The coarse synchro signal is converted immediately before the fine synchro signal. The summation of the two conversions is represented by a single binary word, indicating one angular value. Conversions for single-speed synchros are considered coarse conversions only. NOTE. —For more detailed information on synchros and synchro systems, refer to NAVEDTRA 172-15-00-80, NEETS, Module 15, Principles of Synchros, Servos, and Gyros. DIGITAL-TO-ANALOG CONVERSION Digital-to-analog (D/A) conversion is required when digital devices must communicate with an analog system or equipment. Three types of D/A conversion are commonly encountered on shipboard systems: digital-to-linear, digital-to-scalar, and digital-to- synchro (D/S). Linear signals are ac or dc voltages that 13-7
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normally represent a quantity based on their amplitude with respect to a reference voltage. Scalar Signals consist of two waveforms that represent the sine and cosine of an angle. The device that performs these types of conversions is a digital-to-analog converter (DAC). The DAC may be either a component of a larger device or a stand-alone equipment such as the Digital-to-Analog Converter CV-2517B/UYK Digital-to-synchro conversion is required when communicating with systems that use synchro data transmission. Digital-to-synchro converters are usually found as components of multipurpose conversion equipment. However, a DAC may be modified with a scott-tee transformer to generate synchro signal outputs from scalar voltage waveforms. DIGITAL-TO-LINEAR/SCALAR CONVERSION A digital-to-analog converter (DAC) is a device that receives digital information in the form of a binary word and transforms that information into variations of an analog signal. The DAC outputs an analog signal derived from a reference signal. Normally both the converter and the analog device receiving the data operate off of the same reference. The reference signal is normally greater than or equal to the maximum limit of the output of the converter. The continuous output signal is varied in steps based on the binary inputs to the converter. BAMs are normally used as the binary input for CDS DACs. As a bit position changes in the binary data, the output signal is stepped up or down, based on the value of the bit position orbit positions changed in the input. The output signal only changes when the input data changes. Each converter outputs a single proportional voltage signal. this signal is suitable for linear operations. Two converters are required for scalar or synchro conversions. two separate proportional voltages must be developed to represent the scalar sine/cosine angle which may in turn be fed to a Scott-tee transformer to generate a 3-wire synchro signal. THE DIGITAL-TO-ANALOG CONVERTER CV-2517B/UYK The Digital-to-Analog Converter (DAC) CV-2517B/UYK is a multipurpose converter capable of accepting parallel digital data and converting it to 400-HZ linear, resolver, or synchro outputs. The DAC (figure 13-5) provides the means for digital combat direction systems to communicate with analog gun, electronic countermeasures (ECM), or sonar subsystems. Figure 13-5.—DACs and mounting base. 13-8
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The DAC is mounted on an Electronic Equipment Mounting Base MT-3574B/USQ-20(V), referred to as a BASE. The BASE can accommodate two DACs, as shown in figure 13-5. It provides all electrical interfaces, elects DAC operating modes (TRIGONOMETRIC or LINEAR), and provides simulated digital data for test purposes. There is an accessory to the DAC called the Analog-to-Analog Converter (AAC) CV-2518/UYK The AAC provides signal conversion from linear ac to linear dc or linear dc to linear ac. Each DAC is divided into two identical channels, designated channels A and B. Each channel can output two linear voltages, a sine/cosine resolver (scalar), or a single-speed synchro, depending on the operational mode selected. For simplicity, only one base with one channel of a DAC connected in the converter 1 position is covered here. The base and converter operate as one unit and are discussed as one. digital output channel (DOC). Both the KCMX and DOC functions are covered in this chapter. The output passes through the mounting base, which is transparent for normal computer operations. The output buffer consists of an external function (EF) word, a control address word, and up to eight data words. The EF word master clears the DAC and initiates the receive data from unit computer (RDUC) operations. The control address word defines the control address of the DAC to receive the data words. The individual DAC’s control address is set using the eight-position CONTROL ADDRESS switch on the DAC front panel (figure 13-6). If the data is properly addressed to the DAC, the DAC initiates RDUC operations to process the data words coming from the computer. Each data word contains a data address code (0-7) to define the DAC channel (A or B) that is to process the data. Both DAC channels receive the data; however, only the channel with the CHANNEL DATA ADDRESS switch in the position to match the dataThe DAC normally receives computer output from a 30-bit parallel keyset central multiplexer (KCMX) address will process the data. Figure 13-6.—DAC front panel. 13-9
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DAC Functional Description The DAC can be divided into three major sections: the digital section, the analog section, and the power supply section, as shown in figure 13-7. DIGITAL SECTION. —The digital section processes the EF word and the control address word upon receipt of the EF signal from the computer. If the control address matches the channel A or B address, the digital section generates the output data request (ODR) signal to the computer to start the data word processing. The computer provides a data word along with the output acknowledge (OA) signal. The converter then drops the ODR indicating it has accepted the data. The data bits are fed to the digital section holding registers for the applicable channel and subchannels. The output of the holding registers is fed to the analog section for conversion to proportional voltages. ANALOG SECTION. —The primary function of the analog section is to convert the data words received from the digital section into proportional analog voltages. The form of the analog output is dependent on the mode of operation (TRIG or LINEAR) and, during the TRIG mode, the type of output selected (synchro or resolver). The switches for selecting the converter mode (TRIG/LINEAR) are located on the base (figure 13-8). The switches for selecting synchro or resolver operation in the TRIG mode are located on the DAC front panel (figure 13-6). Each DAC channel (A or B) is in turn divided into two subchannels (A1 and A2 or B1 and B2). The data words accepted by the DAC channel are made up of two 13-bit data words consisting of a polarity bit and a 12-bit code. In the TRIG mode, the 12-bit code represents the sine or cosine outputs. In the LINEAR mode, the 12 bits are converted directly to linear voltages. Channel A1 outputs the sine waveform in the TRIG mode or one of the linear waveforms in LINEAR mode. Channel A2 outputs the cosine waveform in the TRIG mode and the second linear waveform in the LINEAR mode. The polarity bits are used to determine the quadrant in which the angle lies in the TRIG mode and the polarity of the linear output in the LINEAR mode. The actual digital-to-analog conversion is performed using two resistive ladder networks (one each for channels A1 and A2). The logic state of the data and polarity bits controls the operation of analog switches, which route currents from a ladder network into a summing network. A reference voltage for the ladder network is supplied from selected reference transformers. The selection of the reference transformers is dependent on the mode of operation and the state of the applicable polarity bit in the data word. When the proper reference voltages are selected, the currents through the ladder network are summed and applied to the output selection circuit as proportional voltages. The channel A1 and channel A2 proportional voltages represent the sine and cosine voltages for resolver output. For synchro output, the sine and cosine voltages are fed to a Scott-tee transformer by the output selection circuitry. The Scott-tee output consists of the 3-wire, single-speed synchro output. Figure 13-7.—DAC block diagram. 13-10
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POWER SUPPLY SECTION. —The power supply section provides five regulated dc voltages (-4.8, -15, +15, -26.65, and +26.65 vdc) that support the operation of the digital and analog sections of the DAC. The power supply section receives primary ac power from the mounting base. Base Controls and Indicators The mounting base (figure 13-8) provides controls and indicators for the operation of the mounting base and the two associated converters (CONVERTER 1 and CONVERTER 2). MODE CONTROL LOCAL/REMOTE. —This rotary switch selects either REMOTE control of converter operating modes or LOCAL control via the BASE switches. DIGITAL INPUT NORMAL/TEST. —This rotary switch selects either NORMAL digital inputs from the computer or TEST digital inputs simulated by switches on the BASE. OA/EF. —The OA (output acknowledge) and EF (external function) pushbuttons are used to simulate their respective control signals to the converters in TEST mode. CONVERTER 1 POWER ON/OFF. —This switch applies ac power to converter 1 and the right half of the BASE indicator lights. (Because both converter switches and indicators are identical, we will only cover converter 1.) CONVERTER 1 CHANNEL A. —This group of switches and indicators is used to select and monitor the channel mode (TRIG/LINEAR toggle switch) and the subchannel linear voltage type (CHANNEL A1 AC/DC and CHANNEL A2 AC/DC toggle switches) when the BASE is in LOCAL or REMOTE. (Because both channel A and channel B switches and indicators are identical, we only cover channel A.) THIRTY TOGGLE SWITCHES. —A row of 30 toggle switches is used to simulate EF and data word binary data bits when in the TEST mode. DAC Controls and Indicators The DAC provides controls for addressing channels A and B, selecting the TRIG mode (synchro or resolver), and test points for verifying individual channel functions. CHANNEL A MODE SYN/RSVR. —When the TRIG mode is selected at the BASE, this switch selects synchro or resolver output. CHANNEL A DATA ADDRESS. —This 7-position switch is used to select the address for channel A. (Because both charnel A and channel B controls are identical, we only cover channel A.) Digital-to-Synchro (D/S) Conversion A digital-to-synchro (D/S) converter converts BAM data words to single-speed synchro output signals. The D/S converter requires a reference voltage input (115 volt, 60/400 Hz). The D/S conversion is effectively a reverse of the S/D conversion process. The BAM word is used to generate two analog voltages representing the sine and cosine of the synchro rotor angle to be transmitted (figure 13-9). These two voltages are developed by modulating the stepped down reference voltage in phase and amplitude. The phase relationship and amplitude of the sine and cosine signals are based on the data contained in the BAM word. The sine and cosine signals are then stepped up and fed to a Figure 13-9.—Digital-to-synchro (D/S) conversion. 13-12
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Scott-tee transformer to develop the 3-phase stator voltage outputs (S1, S2, and S3) of the single-speed synchro transmission. D/S converters are designed with holding circuits that retain the contents of the BAM words between computer updates of BAM data. The synchro output of the D/S converter is continuous in nature, indicating a new rotor angle only when a BAM word received from the controlling computer contains anew angular value. DIGITAL-TO-DIGITAL (D/D) CONVERSION This section covers those forms of digital data handled by various shipboard data conversion devices. These devices are used to convert digital data from shipboard weapon, radar, and other subsystems to the voltage levels and formats acceptable to the CDS computers. The types of data converted include control and status signals, ready digital (RD) data, demand digital (DD) data, demand digital interrupt (DDI) data, and digital input channel/digital output channel (DIC/DOC) data. Control and Status Signals Control and status signals are discrete ac or dc signals that indicate or control a single function (on/off, true/false, and so forth) or condition in a subsystem. Signals transmitted by CDS equipment to another subsystem are referred to as control signals because they generally initiate an action in the receiving system. Discrete signals received by CDS equipment are referred to as status signals because they generally indicate the status of a condition or function in another subsystem. CONTROL SIGNALS. —Control signals are generated from individual bit positions in a control word. Each bit position of the control word represents one control signal. The individual bits from the control word are fed to relay circuits. A binary ONE will cause a relay closure to take place and an ac or dc signal to be generated from the appropriate supply voltage. A binary ZERO will cause the relay to de-energize, open its contacts, and prevent the voltage transmission. STATUS SIGNALS. —Statis signals are ac or dc voltages received from external subsystems. Each status signal is assigned to an individual bit position in a status word. The status bit becomes a binary ONE when a status voltage is sensed. Lack of a status voltage signal causes the status bit to remain a binary ZERO. Status words are sampled periodically by the controlling computer to determine the current condition of the individual status signal bits. Ready Digital (RD) Data Ready digital (RD) data is 12-bit parallel digital data generated by the CDS radar azimuth converters (RACs). The data indicates the antenna or sweep position of each individual ship’s radar. This data is transmitted to the CDS computer as requested by the computer for program processing and tracking of radar contacts. Demand Digital (DD) Data Demand digital (DD) data is parallel digital data input from manual entry devices. Two input channels are normally used. Each channel may be used by up to eight daisy-chained devices. Each device is identified by an address in the input word. DD data is sampled periodically by the computer to test for operator entries. Demand Digital Interrupt (DDI) Data Demand digital interrupt (DDI) data is parallel digital data similar to DD data. The major difference is in the method of data entry. DDI devices cause an interrupt to be generated to the controlling computer when an entry is made from the applicable device. Digital Input Channel/Digital Output Channel (DIC/DOC) Data Digital input channel/digital output channel (DIC/DOC) channels are multiplexed parallel digital computer channels used to increase the input/output capabilities of the controlling computer. Up to four DICs and four DOCs are provided. The channels may be used for input only, output only, or input/output (I/O) with external peripheral devices or computers depending on the mode or format selected. TOPIC 2—SHIPBOARD DIGITAL/ANALOG SYSTEM INTERFACES In this topic, you will learn about specific equipments and groupings of equipments involved in the data conversion and interfacing process aboard ship. These equipments permit nominally independent 13-13
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shipboard systems or subsystems to communicate or interface with the combat direction system (CDS). MULTIPLEXING DATA CONVERTERS Each shipboard tactical data system has at least one multiplexing data converter. Multiplexing data converters are, in effect, computer-controlled multipurpose devices that operate between one or more digital computers and a number of control, status, digital, and analog devices located in remote subsystems. The individual devices may vary from each other in design due to technological advances and equipment improvements. As a group they perform multiple functions by allowing analog or digital conversion and communications with a variety of equipments or subsystems using multiple data forms (analog, discreet digital, or parallel digital) at the same time or within a very narrow time period (time division multiplexing). Several different versions/generations of multiplexing data converters are currently in use. These include the Keyset Central Multiplexer (KCMXs) CV-2036/USQ-20 and CV-3263/USQ-20 and the Signal Data Converters (SDC) OU-95/UY, CV-2953A, and the Mark 72 Mod 11/12. Individual capabilities vary from device to device. Table 13-3 lists the various converters and compares the range of their capabilities. The particular converter used with the tactical data system depends primarily on ship class. KCMXs are found on the CG or DDG classes and the CV/CVN aircraft carriers. ICKCMXs are found on the DDG TDS Table 13-3.—Comparison of Multiplexing Data Converters 13-14
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systems, while the CV-2953A is found on the DD-963 class of ships. Mark 72 SDCs are found on the CGN-38 class of cruisers. The KCMX handles the widest range of functions of any of the converters. For that reason we selected it as our representative training device. KEYSET CENTRAL MULTIPLEXER (KCMX) The keyset central multiplexer (KCMX) (figure 13-10) provides the means of exchanging data, control, and status information between either one of two Figure 13-10.—KCMX (front view). 13-15
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computers and a variety of input/output devices including multiple control, status, and synchro signal interfaces. The KCMX allows the controlling computer to receive data and status information from external subsystems (missile, gun, electronic warfare [EW], antisubmarine warfare [ASW], and so forth) and to transmit data and control information to external subsystems. A simplified block diagram of the KCMX is shown in figure 13-11. Duplexer and Input/Output (I/O) Logic The duplexer (figure 13-11) allows the KCMX to be controlled by two computers on a one at a time basis. The duplexer is controlled by external function commands from the computers. Three external function commands are used to control the duplexer logic: request control, release local, and release remote. REQUEST CONTROL. —The request control (RC) command permits the requesting computer to gain control of the KCMX if the other computer is not in control. RELEASE LOCAL. —The release local com- mand relinquishes control of the KCMX. RELEASE REMOTE. —The release remote command is a high-priority code that allows one computer to take control of the KCMX from the other computer. I/O LOGIC. —The KCMX communicates with the digital computers over standard CDS slow I/O channels. Digital Control Logic The digital control logic (figure 13-11) puts the KCMX in one of its seven operating modes as specified by the controlling computer. The KCMX operating modes are neutral, duplex, transmit data from unit computer (TDUC), receive data from unit computer (RDUC), TDUC and RDUC, interrupt, and keyset error. NEUTRAL MODE. —Neutral mode is the at-rest mode when neither of the controlling computers is requesting control of, or is in control of, the KCMX. Figure 13-11.—KCMX block diagram 13-16
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DUPLEX MODE. —The duplex mode is the primary control mode for the KCMX. Either of two computers may have control of the KCMX at one time. Each computer must request control by means of an external function. Once the desired mode selections and data exchanges have taken place, the controlling computer must place the KCMX in a neutral state through the use of a release local external function. RECEIVE DATA FROM UNIT COMPUTER (RDUC) MODE. —To output data to the KCMX, the controlling computer must place the KCMX in the RDUC mode by external function. In the RDUC mode, the KCMX is capable of receiving data consisting of DOC output words or control words. DOC data and control signals are the only KCMX functions used to transmit information to external subsystems or equipment. TRANSMIT DATA TO UNIT COMPUTER (TDUC) MODE. —The TDUC mode is used to input addressed data to the controlling computer. The computer places the KCMX in TDUC mode. The external function command specifies the address or addresses of the data to be transmitted to the computer. TDUC AND RDUC MODE. —The KCMX can be placed in the TDUC and the RDUC modes at the same time. Both modes will operate simultaneously under the control of one computer. INTERRUPT MODE. —The KCMX operates in the interrupt mode when indicating an abnormal condition (Type I interrupt) or upon receipt of high-priority data from DDI addresses or DIC external functions or interrupts (Type II interrupt). KEYSET ERROR MODE. —The computer places the KCMX in the keyset error mode to send an error signal to the addressed keyset. Demand Digital (DD) Inputs The 16 demand digital (DD) inputs (figure 13-11) use 30-bit words. Eight DD devices are daisy chained on each of two cables. Each DD device (keyset) is controlled by three control signals: enter, read, and error. A total of 24 control signals is required for the eight DD devices on an input cable. The eight DD devices on the first cable are called group 1 and are assigned KCMX addresses 1 through 10 (all KCMX addresses are octal). Group 2 consists of the other eight devices on the second cable and are referenced by KCMX addresses 11 through 20. Group 1 DD devices may function in either a data (DD) mode or an interrupt (DDI) mode. Group 2 devices function only in the data mode. ERROR SIGNAL. —The error signal is activated by the KCMX under computer control and is a program-controlled function. It is normally generated in response to a format error in the operator entered data. The signal lights the error indicator on the DD device. ENTER SIGNAL. —The enter signal is generated by the DD device when it has a data entry input ready for transmission to the controlling computer. The KCMX, when requested by the controlling computer, samples (reads) the data on the data lines from the DD device. READ SIGNAL. —The read signal is used to activate the DD device data lines. The KCMX activates the read signal for the addressed DD device and waits 200 msec before sampling the data. When the DD de- vice receives the read signal, the data lines back to the KCMX are activated. The KCMX waits the 200 µsec, samples the data, and inputs the data to the controlling computer. DEMAND DIGITAL INTERRUPT (DDI) INPUT. —A demand digital interrupt (DDI) is nothing more than a demand digital device assigned to group 1 when that group is in the interrupt mode. Group 1 is placed in the interrupt mode by a computer external function command. The enter signal is processed differently in the interrupt mode. The KCMX automatically tests and honors the DDI enter signals through an interrupt priority sequence. The KCMX reads the entered data and inputs it to the controlling computer as an interrupt code rather than as a data input word. There is no delay in waiting for the computer to request a data input (DD mode). READY DIGITAL (RD) INPUTS. —There are up to eight inputs for ready digital data (figure 13-11); KCMX addresses 63 through 71 are used for 12-bit data while address 72 is used for 30-bit words. This data is obtained from synchromechanical devices such as the radar azimuth converters (RACs). The data normally represents a digitized analog antenna position. The eight ready digital (RD) inputs occupy separate cables and use only one control signal (enter signal) each. These eight separate signals inform the KCMX that the data on the line is valid and can be sampled. The data is sampled by the KCMX when the corresponding address is designated by the controlling computer to be interrogated and have the data entered (TDUC). If the KCMX attempts to sample the data lines and the enter signal is temporarily false, the 13-17
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KCMX will delay the sampling for 300 µsec. If the enter signal is still false at the completion of this time period, the KCMX will return a data word of all ONES to the computer for that address. If at any time during this delay the enter signal becomes true, the KCMX will sample the data and gate the data into the computer input register and transfer it to the computer with an input data request (IDR). The 12 data bits from addresses 63-71 will occupy the lower 12 bits of the computer input word. Address 72 data bits occupy the entire 30-bit word. Digital Input Channels and Digital Output Channels The KCMX is capable of receiving and transmitting data over four 30-bit CDS I/O channels (DIC1 through DIC4 and DOC1 through DOC4). The input channels are assigned KCMX addresses 73 (DIC1) through 76 (DIC4). The DIC/DOCs (figure 13-11) maybe used for input only devices, output only devices, or a DIC/DOC pair (DIC1/DOC1, DIC2/DOC2, and so forth), which can communicate with an I/O device. The KCMX DIC/DOCs allow the computer controlling the KCMX to communicate with four or more digital devices. The KCMX may function as a computer or as a peripheral device when communicating with the external digital devices. Devices linked by the DIC/DOCs will conform to standard CDS format 30-bit parallel transfers using either computer or peripheral control logic signals. The DIC/DOCs themselves can be manually set to one of two data transfer formats designated peripheral (PERIPH) or computer (COMPUTE). (Both types of transfers involve 30-bit parallel data. Computers generate function codes, while peripherals generate interrupts; peripherals generate requests such as output data requests (ODRs), while computers generate acknowledgments such as output data acknowledges (ODAs), and so on.) In the peripheral format, the KCMX appears as a piece of peripheral equipment to an external computer. In the computer format, the KCMX appears to be a computer to the external peripheral device. The DIC/DOC interfaces have limitations. External functions can only be transmitted from the controlling computer over the DOCs. Interrupts can only be received by the controlling computer from an external device over the DICs. Devices connected using output only or input only configurations may require a DIC/DOC pair to be connected to allow both computer control by external function and device interrupt capabilities. In other words, a single DIC or DOC hookup loses the external function control capability (DIC only) or the external interrupt capability (DOC only). DIGITAL OUTPUT CHANNELS (DOCs).— The cabling for each of the four DOCs is the same as that of a computer or peripheral output channel. A manual switch for each DOC selects either peripheral or computer interfacing for the device connected on that channel. DOC Computer Operation. —The KCMX acts as an interface between the external device (peripheral) and the controlling computer. The KCMX accepts data one word at a time in a buffer from the controlling computer. Up to the first seven words of the buffered data may be external function commands for the external equipment. External function commands sent by the controlling computer to the KCMX setup the buffer size (number of data words) and the number of external function command words in the buffered data. The KCMX generates the external function signals for the external function commands setting up the external equipment and then transmits the remainder of the buffered words as normal computer output data. A maximum of 255 computer words (external functions and data) may be sent by the controlling computer in a single buffer. DOC Peripheral Operation. —In the DOC peripheral operation format, the KCMX acts as an interface between the external device (computer) and the controlling computer. The data buffer from the controlling computer is inputted to the external computer as interrupts or data words. The controlling computer’s external function commands define the number of interrupt words (maximum seven) that precede the data words in its output buffer. DIGITAL INPUT CHANNELS. —The four digital input channels (DICs) are interrogated by the controlling computer on a regular basis. Each DIC is assigned an address (DIC1 address 73 through DIC4 address 76). If the data word being received by the KCMX is not an external interrupt or external function, the KCMX will wait until the DIC address is interrogated before sending the data word to the controlling computer and indicating acceptance of the word to the external device. 13-18
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DIC Computer Operation. —In the DIC computer operation format, the KCMX acts as a computer to an external peripheral device. When the computer receives an input data request (IDR) from the device, the KCMX will store both the request and the input data word. Upon interrogation from the controlling computer, the KCMX will transfer the DIC data to the computer and send an input data acknowledge (IDA) to the external device. DIC Peripheral Operation. —In the DIC peripheral operation format, the KCMX acts as a peripheral to an external computer. The KCMX generates an ODR to the external computer. The computer responds with data and an output data acknowledge (ODA). The KCMX holds the data until interrogation and transfer with the controlling computer. The KCMX then generates another ODR to the external computer. DIC Interrupts. —The KCMX may generate interrupts to the controlling computer for DIC addresses upon receipt of external function commands from the external computer in peripheral format or external interrupts from the external peripheral device when in the computer format. Status Signals Sixty status signals may be received by the KCMX (figure 13-11) via status inputs connected to KCMX addresses 61 and 62. Each KCMX status address provides a 30-bit status word when interrogated by the controlling computer. The condition of each status bit in the two status words is dependent on the condition of its associated status relay coil. The status relays complete the circuit between the KCMX and the external devices generating the status signals. Supply voltages used to generate status signals include but are not limited to 26 vdc, 50 vdc, and 115 vac 60/400 Hz. All 60 status lines and associated supply voltages are connected to the KCMX via 5 status plugboards. Each status signal relay is wired to a status signal return line on a plugboard. A plugboard is an electrical connector wired with short jumper wires to provide flexibility in the connection configuration. The plugboards are wired when the system is installed, depending on the system configuration. Control Signals The control signals (figure 13-11) are generated by the KCMX in response to control word outputs from the controlling computer. Individual bits set in the two control words energize relays to send control voltages to external equipment. Once again plugboards are used to increase system flexibility. Ready Analog (RA) Inputs Processing of synchro inputs (ready analog data) is performed by the synchro multiplexer and synchro converter logic (figure 13-11). The KCMX can accept inputs from 32 three-wire synchros. Six cables are used to connect the synchro inputs and reference voltages to the KCMX. Five cables carry 6 synchro inputs and the sixth carries 2 inputs and up to a maximum of 12 reference voltage inputs. The first 24 synchro channels require 400-Hz reference voltages, while the last 8 may use either 60-Hz or 400-Hz. The KCMX accepts either single- or dual-speed synchro system inputs. The synchro multiplexer provides the method for selecting a unique synchro address from the 32 possible synchro inputs. The KCMX, in response to a TDUC external function from the controlling computer, will convert the addressed synchro input into digital form and transmit the digitized angle (BAM) to the controlling computer. The digital logic in the KCMX allows a fixed time delay for a full conversion to take place. The conversion delay is 2 msec if a 400-Hz reference is used, or 10 msec if a 60-Hz reference is used. A time out of the conversion delay would cause a data word of all ONEs to be returned to the controlling computer. A single synchro-to-digital (S/D) converter processes the multiplexed synchro input. The S/D converter uses the sector method to derive the precise angle of the rotor in BAMs. The converter will perform two separate conversions, the first for the fine speed and the second for the coarse speed. The converter places the combined results as a single BAM word in its output register where the data is held until accepted by the TDUC circuits and inputted to the controlling computer. For single-speed synchros, both fine and coarse conversions are performed, but the results of the fine conversion are ignored. The bits in the BAM word that apply to the fine conversion are left blank (ZERO). Digital-to-Synchro (D/S) Conversion The KCMX does not have a built in D/S conversion capability. To provide this capability, one or more of the DOCs must be connected to DACs. 13-19
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Controls and Indicators (KCMX) The front panels of the KCMX (figs. 13-12 and 13-13) contain all the controls and indicators used by operating personnel. The chassis behind the front panels (A1, A2, A3, and A4) and the power supply chassis in the bottom unit (PS1) can be unlatched and run out like drawers for access to the logic board racks inside. Signals can be observed at the appropriate test points, which are given in the equipment prints. Power supply fuses appear on panel A5 (power control assembly); test points for the power supply can be found by extending chassis PS1 outward. Power Control Assembly (AS) The power control assembly at the top of the unit (figure 13-10) contains the BLOWER ON/OFF switch and indicator, main POWER ON/OFF switch and indicator, running time meter, 3-phase BLOWER POWER fuses, and a 1-amp fuse for the -26.5 vdc power supply. An amber TEST MODE indicator will light whenever the MODE SELECTOR switch (panel A2) is in any position except NORM. The A5 assembly also contains over-temperature warning indicators and bypass circuitry. The red Figure 13-12.—KCMX front panels (A1/A2). 13-20
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Figure 13-13.—KCMX front panels (A3/A4). OVER-TEMP WARNING light will come on and the Computer Input Data Register Panel (A1) horn will sound when the cabinet’s internal air temperature exceeds 115° F (46° C). The ALARM The upper half of the A1 panel (figure 13-12) BYPASS will inhibit the from if desired. The red OVER-TEMP SHUTDOWN indicator will light, and contains the 30-bit COMPUTER INPUT DATA REGISTER. The 30 pushbutton/indicators show thepower will be removed from everything except the blowers if the cabinet’s internal temperature exceeds contents of the computer input data register when the 140° F (60° C). The red OVER-TEMP BYPASS KCMX MODE SELECT switch (bottom of A2 panel) switch/indicator can be used to bypass the is in the NORM position. The pushbuttons can be used over-temperature circuits under EMERGENCY to simulate data from the KCMX to the computer when conditions. The OVER-TEMP RESET pushbutton can the MODE SELECT switch is not in the NORM be used to reset the horn and warning indicators. position. 13-21
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The lower half of the A1 panel (figure 13-12) contains the SIMULATED COMPUTER OUTPUT DATA switches and the DD/DDI SELECT switches and indicators. SIMULATED COMPUTER DATA OUTPUT SWITCHES. —These switches are used to simulate 30-bit computer external function and computer output data words from the controlling computer to the KCMX. DD/DDI SELECT SWITCHES/INDI- CATORS. —These switches and indicators are used to select DD or DDI mode for the group 1 DD devices. The top two indicator/pushbuttons identify the group mode (left DD/right DDI). The pushbuttons may be used to manually switch between DD and DDI modes. The eight individual device indicators show if there is an enter signal on the line from one of the group 1 devices (addresses 1 through 10). The eight ON/OFF switches are used to control the individual device DDI enter signals. The ON position enables the device DDI enter signal, the OFF position disables it. Individual devices will not enter DDI data with these switches OFF, even if group 1 is in the DDI mode. Digital Control Logic Panel (A2) The upper half of the A2 panel (figure 13-12) contains the DATA REGISTER and the CONTROL OUTPUT REGISTER. The data register pushbutton/indicators are lighted to indicate the presence of data for DOC equipments. The pushbuttons may be used to enter data bits into the register for offline operations. The control output register indicates the status of the external control signals. A lighted indicator means a control signal is being generated. The pushbuttons may be used to set individual control signals during offline operations. The lower half of the A2 panel contains the following controls and indicators: DUPLEX controls, KCMX mode controls/indicators, DOC interface controls/indicators, and KCMX interrupt controls/ indicators. DUPLEX CONTROLS. —The duplex controls (figure 13-12) are identical for both A and B computers; therefore, only the A controls/indicators are discussed. The DUPLEX A CONTROL pushbutton/indicator, when lighted, indicates that the A computer is in control. In other than normal operation, the pushbutton may be depressed to simulate that computer A is in control. The DUPLEX A RC, DUPLEX A IDR, and DUPLEX A ODR pushbutton/indicators are lighted to indicate that the KCMX has received the request control (RC), input data request (IDR), or output data request (ODR) signals. These pushbutton/indicators may be used to monitor or, in test mode, to simulate the indicated signals. KCMX MODE CONTROLS/INDICA- TORS.—The TDUC and RDUC pushbutton/indicators (figure 13-12) are lighted when the KCMX is in the associated mode. The pushbuttons may be used to simulate reception of the computer external function roles for that mode. The MODE SELECT rotary switch (bottom of A2 panel) selects one of four operating/test modes. The NORM position permits normal KCMX operation. The DOC position enables testing of the digital output channels. The MANUAL position enables the KCMX to simulate computer operations by the use of the front panel controls. The synchro-to-digital converter may be tested in the A/D CONV position. The MASTER CLEAR pushbutton resets all logic circuits. The INDICATORS ON/OFF toggle switch disables all indicators on the A1 A2, A3, and A4 panels. The CMPTR A EF, B EF, OA, and IA pushbuttons are used to simulate external functions, output acknowledges, and input acknowledges from the computer. The DATA pushbutton/indicator is lighted when the KCMX is in the RDUC mode and is prepared to transfer a data or control word. The pushbutton is used to enable the data transfer sequence when a simulated computer OA signal is present. The BFW indicator is lighted when the KCMX is in the RDUC mode and processing a computer buffer function word (BFW). The pushbutton is used to simulate reception of the RDUC BFW code from the computer. The CONTROL CHANNEL pushbutton/indicator is lighted when a control word transfer takes place. The pushbutton may be used to simulate a control word transfer. The six pushbutton/indicators labeled CURRENT ADDRESS (figure 13-12) display the octal KCMX address being interrogated by the TDUC mode. The pushbuttons may also be used to allow manual selection of a single address, or starting address of a set of addresses to be interrogated in a test mode. The FINAL ADDRESS pushbutton/indicators are used to select (test mode) or display (TDUC mode) the last KCMX address of a set of addresses being interrogated. The ADDRESS CLEAR pushbutton clears both the current and final address bit indicators. 13-22
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The KEYSET ERROR pushbutton/indicator is lighted to indicate that the KCMX is in the keyset error mode. It maybe manually set to indicate reception of the computer external function keyset error bit. DOC INTERFACE CONTROLS/INDI- CATORS. —In the RDUC mode, the pushbutton/ indicators labeled DOC 1, 2, 3, or 4 are lighted when the buffer function word specifies a DOC transfer (DOC1-DOC4). The pushbuttons may be used to simulate a buffer function word DOC input data (ID) code. Four toggle switches (DOC 4, 3, 2, 1 COMPUTER/PERIPHERAL) are used to manually select the DOC operational mode. KCMX INTERRUPT CONTROLS/INDICA- TORS. —In the interrupt indicators (A/B COMPUTER INTERRUPTS), CMPTR A INT and CMPTR B INT pushbutton/indicators are lighted when an interrupt signal is on the computer (A or B) input line. The buttons may be used to simulate an interrupt condition. The six interrupt pushbutton/indicators (INTERRUPTS) are left to right; ILL ADR, EIC, EEC, DIC REQ, DD, and ID ERR. The pushbuttons for the interrupt indicators may be used to simulate the associated interrupt condition. When an illegal address (octal 00 or 77) is detected in either the current or final address registers, the ILL ADR indicator is lighted. The EIC pushbutton/ indicator is lighted to indicate an end-f-input cycle. The EEC indicator is lighted to indicate when the KCMX has completed a keyset error transmission. The DIC REQ indicator is lighted when the digital input channel request interrupt is active. The DD indicator is lighted when an enter signal is received from a group 1 keyset and the group is in the interrupt mode. When the KCMX detects an error in the buffer function word ID codes, the ID ERR indicator is lighted. The EOC ENABLE/DISABLE toggle switch is used to enable or disable the sending of an end-of-output cycle (EOC) interrupt to the computer. The indicator above the toggle switch indicates the detection of an end-of-output cycle condition. The COMPUTER ACKNOWLEDGE (CA) push- button/indicator is lighted when a computer (A or B) has been granted control of the KCMX and the KCMX sends a control acknowledge interrupt to the computer. The pushbutton may be used to simulate the CA interrupt. Digital Input Channel (DIC) Logic Panel (A3) The A3 panel (figure 13-13) contains the registers, controls, and indicators for monitoring and testing DIC operations. There are four 30-bit registers labeled DIC 1 INPUT REGISTER through DIC 4 INPUT REGISTER. These registers are used to indicate the status of the bit positions for each channel. In KCMX operations other than the normal mode, each bit position may be set manually using the pushbutton/indicator. Each channel has its own toggle switch for computer or peripheral mode selection, two TEST pushbutton/indicators, and an INPUT ACTIVE pushbutton/indicator. The input active indicators are lighted when an interrogation for the associated channel is being performed. The two TEST pushbutton/indicators for each channel indicate the status of external functions or interrupts (EF/INT) and output acknowledges or input data requests (OA/IDR). The DIC mode selected determines which of the signals is being displayed. The DIC computer uses EF and OA, while the DIC peripheral uses INT and IDR. The lower portion of the A3 panel contains some pushbutton/indicators used with DOC operations. DOC EF/INT is a three-stage counter used to determine the number of DOC EF or INT words in an output buffer (maximum of 7). The DATA WORDS counter keeps track of the number of data words in an output buffer (maximum of 191). S/D Converter/Multiplexer Panel (A4) The controls and indicators for the synchro-to- digital converter and multiplexer are contained on the A4 panel (figure 13-13). There are 12 indicating fuses (F1-F12) for the 12 reference input transformers. An indicator lights on the fuseholder when the reference voltage is present and the associated fuse is open. The TEST indicator lights when the seven-position SELECTOR switch is in any position other than normal (NORM). The SELECTOR switch, in any position but normal generates a simulated single-speed synchro angle. The following is a summary of the switch positions and angles: 13-23
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Figure 13-14.—Manual switchboard. 13-24
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The SECTOR REGISTER consists of three pushbutton/indicators. The register displays the sector number of the 60-degree sector in which the rotor is located. The pushbuttons may be used to simulate a sector angle. The eight pushbutton/indicators of the RATIO REGISTER indicate or simulate the binary ratio angle. The +REF/OFF/-REF toggle switch allows selection of positive (+REF) or negative (-REF) reference voltage. The switch is set to the OFF position for normal operations. The OSCILLATOR potentiometer is used to vary the frequency of the S/D converter test circuits from 2 to 100 Hz. With the HIGH/LOW toggle switch in the HIGH position, the S/l) converter is enabled for continuous recycling when in the test mode. When the switch is in the LOW position, the recycling rate can be varied from 2 to 100 conversions a second using the OSCILLATOR potentiometer. The OUTPUT REGISTER has 15 pushbutton/ indicators and a clear pushbutton. The register indicates the 15-bit BAM output of the S/D converter. Each bit-position indicator equates to a degree value portion of the summed synchro-mechanical angle. TOPIC 3—SWITCHBOARDS Shipboard tactical data system devices are interconnected with each other and with equipments in other shipboard subsystems through switch- boards. Combat systems use two major types of switchboards: digital switchboards and analog switchboards. Digital switchboards primarily interconnect digital devices. These types of interfaces include computer-to- computer interfaces and computer-to-peripheral devices and other serial or parallel digital inter- faces. Analog switchboards provide the interconnection for analog devices and signals including control and status signals, synchro signals, and linear signals. In addition, analog switchboards provide supply and return voltages and reference voltages for analog signal exchanges. Most current shipboard combat direction systems use a combination of analog and digital switchboards to completely interface CDS equipments with each other and with other shipboard sub- systems. DIGITAL SWITCHBOARDS The two basic types of shipboard digital switchboards are manual switchboards and remotely Figure 13-15.—Sample manual switching configuration. controlled switchboards. Manual switchboards are made up of variable configurations of three-position or five-position switches (figure 13-14). Each switch must be manually positioned for the interconnection required by the current system configuration. At least two manual switches, one for input and one for output, are required for each I/O device or computer channel to allow for the complete range of system configuration requirements (figure 13-15). Manual switchboards are for the most part being replaced by remotely controlled switchboards. 13-25
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Remotely controlled switchboards (figure 13-16) allow for configuration changes to be controlled from one or two remote computer switching control panels (CSCPs) (figure 13-17). The actual switch configuration and data routing take place in the CDS digital fire control switchboard (DFCS). This greatly reduces the time required for configuration changes in the event of equipment casualties. As examples of DFCS and CSCP we are using the Mk 70 Mod ( ) DFCS and the Mk 328 Mod ( ) CSCP. The Mod numbers of the DFCS and CSCP will vary with the ship class on which they are installed. For training purposes we refer to the Mk 70 as the DFCS and the Mk 328 as the CSCP. DIGITAL FIRE CONTROL SWITCHBOARD (DFCS) The digital fire control switchboard (DFCS) (figure 13-16) provides data routing, power monitoring, action cutout (ACO) switching, and digital switching. To perform these functions, the switchboard uses remotely operated switches and other assemblies. The switches route digital signals through the switchboard during normal operation. The digital signals consist of groups of parallel bits, which form digital words. The digital words are transmitted between computers, associated peripheral equipment, and digital equipment in other subsystems as shown in figure 13-18. The switches also can be used to interrupt or redirect signal flow manually during maintenance operations. Control and status signals are normally used to initiate the switching action and monitor the status of the switch positions. The CSCP generates control signals to select the desired switch configuration on the switchboard. Status signals from the switchboard light indicators on the CSCP to display the current switching configuration. In a casualty situation, manual positioning of switches can be performed. The DFCS is composed of two or more switch- board sections (figure 13-16) covered with variable configurations of switch panels. Each panel type performs a specific function. The 24 panels per section are normally arranged in groups according to the functions performed by the panels. The front panel of each switchboard section is hinged on the left side to Figure 13-16.—Digital fire control switchboard (DFCS). 13-26
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Figure 13-17.—Computer switching and control panel (CSCP). Figure 13-18.—Equipment interconnection through the CDS DFCS. 13-27
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allow access to the interior of the switchboard. The interior of the switchboard (figure 13-19) contains a system of modules and terminal board connectors that allow ship’s wiring to be interconnected to the appropriate switch panels. The switchboard panel locations are numbered for identification purposes starting at the upper left corner of the switchboard. The numbering continues from top to bottom, left to right. Each panel is marked with a designation plate mounted on the upper-left corner of the panel assembly or with a blank plate. Power Distribution Panel The power distribution panel (figure 13-20) provides a visual indication of power supplied to the switchboard. Six indicators are mounted on the front of the panel and lighted when the appropriate power has been applied to the panel and distributed to the remainder of the switchboard. Linear Movement Switch Assemblies The majority of panel assemblies are linear movement switch assemblies. These assemblies route a specific number of circuits. The linear movement switch assemblies are normally positioned by control signals from the CSCP, but they may be manually positioned. There are two types of linear movement switch as- semblies, the R3DLSO-lB/R5DLSO-lB (figure 13-21) Figure 13-19.—DFCS interior. 13-28
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Figure 13-20.—Power distribution panel assembly. Figure 13-21.—R3DLSO-1B/R5DLSO-1B linear movement switch assembly. 13-29
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and the R3BLSO-lC/R5BLSO-lC (figure 13-22) assembly. The assemblies differ from each other in the front panel organization and in the wiring module capabilities. The panels provide different arrangements of 20-pin, 38-pin, 117-pin, and 120-pin connectors. Both types of linear switches have similar mechanism and contact assembly modules. The mechanism assembly module contains the drive motor, the control circuit module, and the control transformers for remote operation of the switch. The contact assembly module consists of a stationary control plate and a moveable plate to perform the switching functions. The linear switches perform either three-position (R3) or five-position (R5) switching functions. The three-position switches are used for NORMAL/ ALTERNATE configuration switching with an OFF position for circuit isolation. The five-position switches have an OFF position with the four other switch positions being used for circuit configuration or reconfiguration. For an example, see figure 13-23. One channel of a duplexed magnetic tape unit can be switched between four separate CDS IOC channels or isolated in the OFF position. The front panels of both types contain a REMOTE-MANUAL toggle switch. When the switch is in the REMOTE position, the CSCP has control of the switch position (normal operating mode). When the toggle switch is in MANUAL, the switch must be positioned using the switch handle. Switch Control and Potential Transformer ACO Assembly The switch control and potential transformer action cutout (ACO) assembly (figure 13-24) provides control voltages for bench testing of the linear movement switches. The control voltages are provided through test cables from the test jack to the linear switch assembly under test. Figure 13-22.—R3BLSO-1C/R5BLSO-1C linear movement switch assembly. 13-30
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Figure 13-23.—Magnetic tape interconnection through the DFCS. Figure 13-24.—Switch control and potential transformer ACO assembly. 13-31
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Figure 13-25.—Relay tester assembly. Relay Tester Assembly The relay tester assembly (figure 13-25) provides the facilities for testing each type of relay used in the DFCS and the CSCPs. Relay sockets are provided for 8-, 10-, and 16-pin relays. The rotary switch is used to select the appropriate relay coil voltage. The toggle switch is used to energize/deenergize the relay coil. The indicator lamps indicate the state of the relay under test (ENERGIZED/DEENERGIZED). Fuse Tester Assembly The fuse tester assembly (figure 13-26) is used to test fuses for continuity. The POWER ON PBI is used to apply power to the fuse tester. The POWER ON indicator will light when the tester is on. When a good fuse is placed across the contact strips, the CONTINUITY INDICATOR light will come on. A blown fuse placed across the contact strips will not light the indicator, since there is no current path through the fuse. Figure 13-26.—Fuse tester assembly (DFCS). 13-32
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Computer Switching and Control front panel (figure 13-27). The CSCP will generate a Panel (CSCP) control signal to the appropriate DFCS linear switch assembly, which will respond with a status signal when The two computer switching and control panels it is in the assigned position. The PBI will light when(CSCPs) are used to make switch assignments on the the switch is in the commanded position.DFCS (controlling CSCP front panel). Switch assignments are made by depressing the associated Four colors are used for PBI indicators: white, red, pushbutton/indicator (PBI) on the controlling CSCP green, and yellow. White indicates the linear slide Figure 13-27.—CSCP controls and indicators. 13-33
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switch position is in the ON position. Red indicates the switch is in the OFF position. Green indicates the switch is in the NORMAL position, while yellow indicates the switch is in the ALTERNATE position. Figure 13-27 shows an example of a typical CSCP configuration. The number and functional assignment of PBIs vary from ship to ship. The PBIs in the lower right comer of the CSCP front panel shown in figure 13-27 are used to apply power to the CSCP PBIs (ON), to indicate current CSCP control status (CSCP CONTROL or ALT CSCP CONTROL), and to transfer control from the controlling CSCP to the alternate CSCP (REQ CONTROL, HOLD, ACT CSCP REQ CONTROL, and ALT CSCP HOLD). Manual PBI actions are required at both CSCPs to transfer control between panels. At the requesting CSCP, depression of the REQ CONTROL PBI will cause the ALT CSCP REQ CONTROL indicator to light red on the controlling CSCP. The REQ CONTROL PBI will flash red on the requesting CSCP until the operator of the controlling CSCP depresses AT CSCP CONTROL PBI, giving control to the requesting CSCP. The CSCP CONTROL light will come on when the requesting CSCP is in control and the flashing light will go out. The HOLD PBIs are used to indicate refusal to transfer control. SHIP, SWITCHBOARD, AND COMPUTER SWITCHING CONTROL PANEL (CSCP) WIRING Switchboard and CSCP wires connect assemblies and components inside the switchboard and CSCP. Ship’s cables are individually plug-connected to panel connectors in the switchboard. Ship’s cables are identified by a cable group number and cable type. Ship’s cables, switchboard wires, and CSCP harness wires use plastic sleeves or metal tags for marking. Each ship wire has a marking bearing the ship’s wire number. When required, switchboard and CSCP wires have plastic marking sleeves at each end. The sleeves identify the terminals at both ends of the wire. Separate wiring codes are used for ship’s wires, switchboard wires, and CSCP wires. The ship’s wire marking codes are system oriented. They consist of an alphanumeric code that identifies the signal being carried by function number, circuit designation, and assigned wire number. A typical ship’s wire code number is shown in table 13-4. Table 13-4.—A Typical Ship’s Wire Code Number There are eight types of PANEL ASSEMBLY connectors used in the switchboard. These connectors are used for the linear movement switch assemblies, fuse tester assembly, relay tester assembly, and power distribution assembly. They consist of various types of 120-, 117-, 104-, 85-, 38-, 20-, 10-, and 3-pin connectors. For wiring and maintenance purposes, a common alphanumeric designation system is used to identify specific circuit connections, as shown in table 13-5. Table 13-5.—Panel Connection Cable Code Within the switchboard are what are known as matrix panels. The matrix panels interconnect the signal paths between the ship’s wiring and the assembly panels. The designation codes for matrix panel connections are shown in table 13-6. Table 13-6.—Matrix Panel Connection Code Intersection connectors are used to tie switchboard sections together. Intersection connector codes are identified in table 13-7. Table 13-7.—Intersection Connector Code The CSCP uses two types of connectors, a 10-pin connector and an 85-pin connector. The l0-pin connectors are designated JA, JB, JN, and JP. The 85-pin connectors are designated JC through JG, JH, and JK. The alphanumeric identification shown in table 13-8 is used for CSCP connectors. 13-34
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Table 13-8.—CSCP Connector Code ANALOG SWITCHBOARDS Analog switchboards are similar in design to the Mk 70 DFCS. The switchboard is made up of a variable number of switchboard sections. The number of sections required will vary with the analog interface requirements of the shipboard system. Each switchboard section consists of front and rear cabinets (figure 13-28). The front cabinet contains the panel assemblies. The rear cabinet contains removable modules on which are mounted the ship’s cable connectors. Each switchboard section contains 36 panels of various types mounted on the door of the front cabinet. The panels are numbered starting with panel 1 in the upper left-hand corner in section 1 and progressing consecutively downward in each column and successively to the right. The door in each switchboard section allows access to the section interior. Figure 13-28.—Analog switchboard. 13-35
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Figure 13-29.—Analog switchboard section, door open. Ship’s cables enter the switchboard through the rear cabinet and connect to the front of the module terminal boards (figure 13-29). From the panel assemblies, wiring is routed to the back side of the terminal boards on the modules via plug connectors. Wiring between switchboard sections is routed via inter-section connectors. The following panel assemblies are found on analog switchboards. Individual analog switchboard layouts and configurations will vary between ship classes. Indicator Panel Assembly The indicator panel assembly (figure 13-30) provides a visual indication of the active power being supplied to the switchboard. The panel assembly contains up to 10 indicators, all of which are mounted on the front panel. 13-36 Figure 13-30.—Indicator panel assembly.
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Figure 13-31.—Fuse panel assembly. Fuse Panel Assembly The fuse panel assembly (figure 13-31) contains overflow fuses for circuits located in an associated panel. Each panel may contain up to 10 dual indicator-type fuseholders. Fuse Tester Panel Assembly The fuse tester panel (figure 13-32) functions in the same manner as the Mk 70 DFCS fuse tester panel. Figure 13-32.—Fuse tester assembly (analog switchboard). Figure 13-33.—Meter panel assembly. Meter Panel Assembly Two meter panels (figure 13-33) are used: one panel type monitors 60-Hz and 400-Hz power buses and the other monitors dc buses. The panels contain an ac or dc meter and a rotary snap switch. The snap switch enables voltage measurements to be performed on the selected power bus. Flasher Panel Assembly The flasher panel (figure 13-34) produces pulsating (ON/OFF/ON and so forth) potentials to activate Figure 13-34.—Flasher panel assembly. 13-37
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Figure 13-35.—Snap switch panel assembly. flashing system indicators when a warning or emergency condition occurs. Motor-driven dual-cam and three-cam activated switches open and close control or status signal circuits to provide the flashing effect on indicator lamps. Snap Switch Panel Assembly The snap switch panel assembly (figure 13-35) provides manual control of switchboard power buses. An individual panel mat contains either one or two snap switches. The snap switch (figure 13-36) is a device that opens or closes a circuit with a quick motion. Rotary snap switches are used extensively in the distribution Figure 13-36.—Snap switch. 13-38 Figure 13-37.—Manually operated JR switch panel assembly. sections of switchboards to connect the shipboard power supplies to the various switchboard power buses. Manually Operated JR Switch Panel Assembly The manually operated JR switch panel assembly (figure 13-37) provides manual switching and action cutout (ACO) functions. The manually operated JR switch panel assembly uses either a 2JR or 4JR switch. Both switch types are similar in construction and differ only in the electrical application because of switching action. A JR switch as shown in figure 13-38 is made up of a variable number of waferlike sections. As the switch is manually positioned, one or more moveable contacts are positioned to each switch position on the wafer. The contacts may connect (bridge) two or more contacts on each wafer effectively opening or closing circuit paths as required to configure the system for normal or alternate operation. Remotely Operated JR Switch Panel Assembly The remotely operated JR switch panel (figure 13-39) provides remote and manual control of signal routing and ACO switching. The automatic junction rotary (AJR) switches used in these assemblies are driven by a motor and gear train servo system. The automatic switches allow control of switching functions from remote stations. Analog switchboards used with combat direction systems use control signals provided by the multiplexing data converter to activate the switches and provide status signals back to the converter to indicate switch position to the system.
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Figure 13-38.—JR switch (type 4). Each panel contains a REMOTE-MANUAL toggle switch. The servo system controls the position of the AJR switch when the toggle switch is in the REMOTE position. The toggle switch must be placed in MANUAL to allow personnel to rotate the switch. Linear Movement Switches In newer switchboards and upgrades to older switchboards, the rotary-type JR and AJR switches have been replaced by linear movement switches with the same electrical configurations as the JR switches. We covered linear movement switch panel assemblies in the Mk 70 DFCS. Figure 13-39.—Remotely operated JR switch panel assembly. END-AROUND-TEST (EAT) One of the functions provided by both analog and digital switchboards is the end-around-test (EAT). When switches are in the EAT position, switchboards take the output of a device and feed it back to the same or similar device as input data. For instance, a control signal generated by a device such as the KCMX can be routed end-around as a status signal input. The output of a digital-to-synchro (D/S) converter can be fed end- around to a synchro-to-digital (S/D) converter or the output channel of a computer can be end-around as an input channel for the same computer. EAT allows for offline testing and verification of the operability of digital and analog interfaces, both within the CDS and external to the CDS. SUMMARY-DATA CONVERSION DEVICES AND SWITCHBOARDS This chapter has introduced you to analog-to- digital (A/D), digital-to-analog (D/A), and digital-to- digital (D/D) conversion methods and some typical conversion devices. You were also introduced to data switchboards used in system configuration. The following information summarizes important points you should have learned. FUNDAMENTALS OF DATA CONVER- SION— The digital equipment that composes the combat direction system (CDS) uses information in analog form. To use this information, the analog signals must first be converted to digital signals. The amplitude, frequency, or phase of an analog signal may represent a value within a given set of limits (minimum 13-39
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limit to maximum limit). Binary codes of ONEs and ZEROs are used to represent digital values. Each bit position in a binary number represents a portion of the overall quantity being represented. The summation of the values of the set bits (ONEs) determines the value to be represented. ANALOG-TO-DIGITAL (A/D) AND DIGI- TAL-TO-ANALOG (D/A) CONVERSIONS— The analog-to-digital conversion process can be divided into three operations: sampling, quantization, and encoding. ANALOG AND DIGITAL QUANTITIES— An analog signal is sampled or tested repeatedly over a period of time to determine the characteristic that contains the analog quantity. The sampled analog value is converted to the nearest binary value or quantity. The binary value is then encoded into a code acceptable to the digital equipments that use the data. Standardized binary words called BAMs (binary angular measurement) are used to transmit angular, range, and height values between digital equipments in shipboard combat direction systems. Other coding systems such as Gray code or binary-coded decimal (BCD) are also used to transmit converted values. ANALOG-TO-DIGITAL CONVERTERS— An analog-to-digital converter is a device that receives an analog signal and converts it to a digital (binary) quantity with a given accuracy and resolution. SYNCHROS— One of the most common analog shipboard signals indicating angular position that requires conversion to binary is the 3-phase or 5-wire synchro signal. Synchro is the name given to a variety of rotary, electromechanical, position-sensing devices. A synchro system is made up of a combination of a synchro transmitter and one or more synchro receivers. There are two major classifications of synchro systems: torque systems and control systems. Most shipboard synchro systems operate on a supply or reference voltage of 115 vac at a frequency of 60 or 400 Hz. SYNCHRO ACCURACY— The accuracy of data transmitted by synchros is improved by using a multispeed synchro system such as a dual-speed system. A dual-speed synchro system uses two synchro transmissions, with a common reference voltage, called the coarse and fine transmissions. The coarse and fine transmissions are converted separately and the results are then combined into one BAM word. SYNCHRO SIGNAL CONVERSION— Two methods are currently in use to convert synchro signals to digital (BAM) words: the sector method and the octant method. SECTOR METHOD— The sector method first determines the 60-degree sector angle in which the rotor is positioned using the stator voltages. When the sector has been determined, two of the three stator voltages are sampled to determine the ratio angle within the sector. The sector angle and the ratio angle are then summed to determine the binary angle of the rotor position in BAMs. OCTANT METHOD— The octant method first determines the 45-degree octant by converting the synchro signal into two sine and cosine voltages. The remaining angle within the octant is determined by a process of successive approximations. THE DIGITAL-TO-ANALOG CONVERTER CV-2517B/UYK— The CV-2517B/UYK DAC is a multipurpose digital-to-analog converter. It is capable of accepting parallel digital data words (BAMs) and converting them into linear, scalar, or synchro output signals. Each DAC is divided into two channels, designated channels A and B. Each channel can output two linear voltages, a sine/cosine scalar signal, or a single-speed synchro signal. SHIPBOARD DIGITAL/ANALOG SYSTEM INTERFACES— Shipboard digital/analog system interfaces permit nominally independent shipboard systems or subsystems to communicate or interface with the combat direction system. MULTIPLEXING DATA CONVERTERS— Multiplexing data converters are computer-controlled multipurpose devices that operate between one or more digital computers and a variety of control, status, digital and analog devices located in remote shipboard subsystems. KEYSET CENTRAL MULTIPLEXER (KCMX)— The KCMX provides the means for exchanging data, control, and status information between either one of two computers and a variety of I/O devices. The KCMX duplexer allows two computers to alternately control operation of the KCMX. Three external function (EF) commands are used to control the duplexer operation: REQUEST CONTROL, RELEASE LOCAL, and RELEASE REMOTE. The KCMX can operate in one of seven modes, as specified by the controlling computer: NEUTRAL, DUPLEX, RDUC (receive data from unit computer), TDUC (transmit data to unit computer), TDUC and RDUC, INTERRUPT, and KEYSET ERROR. 13-40
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KCMX INPUT AND OUTPUT— The KCMX can receive ready digital (RD) data from up to eight radar azimuth converters (RACs). The ENTER signal indicates that the ready digital (RD) data is valid and may be sampled and sent to the controlling computer. The KCMX is capable of outputting data over four digital output channels (DOCs) and receiving data from four digital input channels (DICs). These channels can be manually set to computer (COMPUTE) or peripheral (PERIPH) formats. The KCMX can receive up to 60 status signals. The status signals’ conditions (0 or 1) are inputted to the computer as two 30-bit status words. The KCMX generates control signals based on individual bits set in two control words received from the controlling computer. KCMX CONVERSIONS— The KCMX can accept and convert inputs from up to 323-wire synchros using 12 reference voltages. Two separate conversions are performed for each input, one for the fine speed and one for the coarse speed. When converting single-speed synchro inputs, both conversions are performed. However, the fine conversion is ignored and the bits that apply to the fine conversion in the BAM word are zeroed. SWITCHBOARDS— Switchboards are used to interconnect a ship’s systems. There are two major types of switchboards: digital and analog. DIGITAL SWITCHBOARDS— Digital switch- boards primarily interconnect digital devices. There are two types of digital switchboards: manual switchboards and remotely controlled switchboards. MANUAL SWITCHBOARDS— Manual switch- boards are made up of variable configurations of manually operated three-position and five-position switches. REMOTELY CONTROLLED SWITCH- BOARDS— Remotely controlled switchboard configuration changes are accomplished from one of two computer switching control panels (CSCPs). The CSCP generates control signals to position the linear slide switches and receives status signals from the switches to indicate current switch position. DIGITAL FIRE CONTROL SWITCHBOARD (DFCS)— The digital fire control switchboard (DFCS) performs data routing, power monitoring, action cutout (ACO) switching, and digital switching. SHIP, SWITCHBOARD, AND CSCP WIRING— All cables and wires used aboard a ship are labeled with a specific code. Specific codes are used to identify ship’s wiring, switchboard wiring, and CSCP wiring. These codes are found on metal or plastic labels on each end of the cable. ANALOG SWITCHBOARDS— Analog switch- boards receive control signals from the multiplexing data converter to position the automatic junction rotary (AJR) switches and provide status signals to indicate switch status. END-AROUND-TEST (EAT)— One of the functions provided by both analog and digital switchboards is the end-around-test (EAT). When switches are set to the EAT position, the switchboard routes the output of a device back to the same or similar device as input data. 13-41
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APPENDIX I GLOSSARY OF TERMS AND ACRONYMS 2M— Miniature/Microminiature (2M) Electronic Repair. A/D— Analog-to-digital. AAC— Analog-to-analog converter. ABORT— To end the execution of a program before is it completed because of an irrecoverable error, mistake, or malfunction. ABT— Automatic bus transfer. ac— Alternate current. ACO SWITCHING— Action cutout switching. ADDRESS— A character or group of characters that defines a particular part of storage, some other data source, or destination. Nor- mally the location of a given storage cell in a memory. ADDRESS BUS— A bus carrying signals that define storage addresses. ADP— Automated data processing. ALGORITHM— The series of steps to solve a problem. ALS— Advanced low-power Schottky. Alt— Alternate. ALU— Arithmetic logic unit. amp— Amplifier. ANEW— Army-Navy Electronic Warfare. ANSI— American National Standards Institute. AS— Advanced Schottky. ASCII (American Standard Code for Information Interchange)— A standard 8-bit code for use with computers and data terminals. ASR— Active status register. ASW— Antisubmarine warfare. ASW SYSTEMS— Antisubmarine warfare systems. ASWOC— Antisubmarine Warfare Operations Cen- ter. ASWOC/HLT— Antisubmarine Warfare Operations Center/High-Level Terminal. Async— Asynchronous. AZIMUTH— An angular measurement in the hor- izontal plane in a clockwise direction. BAM— Binary angular movement or motion. BAP— Buffer address pointer. BASIC— Beginner’s All-purpose Symbolic Instruction Code. BBC-MTC CABLE— Buffered block channel/mag- netic tape controller cable. BBU— Battery back-up unit. BCD— Binary-coded decimal. BCH— Binary-coded hexadecimal. BCO— Binary-coded octal. BCW— Buffer control word. BEARING— An angular measurement of the direc- tion of an object from a reference direction, such as true north. AI-1
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BFW— Buffer function word. BIDFET— Highvoltage bipolar field-effect transistor. BIDMOS— High voltage DMOS FET. BIFET— Bipolar field-effect transistor. BIMOS— Bipolar metal-oxide semiconductor, com- bines bipolar and MOS technology. BIOS— Basic input/output system. BIPOLAR— A logical true input represented by an electric voltage polarity opposite to that re- presenting a logical false input. BIPOLAR ICs— Contain parts comparable to dis- crete bipolar transistors, diodes, capacitors, and resistors. Controlled by current applied to the control terminal (base). BIT— Built-in test. BOT— Beginning-of-tape mark. bpi— Bits per inch. bps— Bits per second. BREAKPOINTS— Location of a point in a program where program executing can be stopped to permit a visual test, printing, or a performance analysis. BUS— One or more conductors used to transmit signals. C/D— Control/data. CA— Computer acknowledge. CAP— Chain address pointer. CAS— Column address strobe. CD-ROM— Compact disc read-only memory. A high density optical storage medium. CHIP— An integrated circuit on a piece of semi- conductive material. CIS— Computer Interconnection System. CLCC— Ceramic leadless chip carrier. CLK— Clock signal. CML— Current mode logic. CMOS— Complementary metal-oxide semiconductor. Where both NMOS and PMOS transistors are integrated into the same gate circuit. CMPs— Control and maintenance panels. CMR— Code memory register. CNP CABLE— Communication network processor cable. COBOL— COmmon Business Oriented Language. COMPUTER WORD— A word stored in one computer memory location and capable of being treated as a unit. Synonymous with full word, machine word. CONTROL BUS— A bus carrying signals that regulate system operations. cpi— Characters per inch. CPU— Central processing unit. CS— Chip select. CSCP— Computer switching control panel. CSTOM— Combat systems operating manual. Ctrl— Control. CTS— Clear to send. CV-ASWM— Carrier-Antisubmarine Warfare Mod- ule. CD-I— Compact disc-interactive. CDS— Combat direction system. D/D— Digital-to-digital. D/A— Digital-to-analog. AI-2
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DAC— Digital-to-analog converter. DATA BUS— A bus used to communicate data internally and externally to and from a pro- cessing unit, or a storage or peripheral de- vice. DBCU— Data bus control unit. dc— Direct current. DCE— Data communications equipment. DCI— Defective card index. DCU— Display control unit. DD— Demand digital. DDI— Demand digital interrupt. DECODE— To convert data by reversing the effect of some previous encoding. Del— Delete. DEMON— Diagnostic environment monitor. DFCS— Digital fire control switchboard. DIBIT (dipole bit)— A form of data prerecorded on a disk pack during manufacture. Recorded only on servo tracks of standard disk packs. DIC— Digital input channel. DIM/DOM— Digital input multiplexer/digital output multiplexer. DIP— Dual-in-line package. DIP SWITCH— Dual-in-line switch. DMA— Direct memory access. DMI— Direct memory interface. DMOS— Diffused metal-oxide semiconductor. DMTU— Digital magnetic tape unit. DOC— Digital output channel. DOS— Disk operating system. DOT MATRIX— A matrix of rows and columns of dots used to generate characters or character images composed of dots. dpi— Dots per inch. DRAM— Dynamic random access memory. DSR— Data set ready. DTC— Desktop computer. DTE— Data terminal equipment. DTL— Diode-transistor logic. DTR— Data terminal ready. EA— Electronic attack. EAPROM— Electrically alterable programmable read-only memory. ECL— Emitter-coupled logic. EDIT— To prepare data for a later operation. Editing may include the rearrangement or addition of data, the deletion of unwanted data, or the addition/deletion of format control char- acters. EEPROM— Electrically erasable programmable read-only memory. EF— External function. EFA— External function acknowledge. EFM DATA— Eight-to-fourteen modulation data. Used with CD-ROM. EFR— External function request. EGA VIDEO— Enhanced graphics adapter video. EI— External interrupt. EIA— Electronks Industry Association. AI-3
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EIE— External interrupt enable. EIR— External interrupt request. EL— Electroluminescent. EMI— Electromagnetic interference. ENCODE— To convert information into coded form. EOT— End-of-tape mark. EPROM— Electrically programmable read-only memory. ESA— Externally specified address. ESD— Electrostatic discharge. ESDI— Enhanced small device interface. A fixed disk interface. ESI— Externally specified index. EVEN PARITY— A characteristic of a group of bits having an even number of binary ONEs. EW— Electronic warfare. FAT— File allocation table. FDDI— Fiber Distributed Data Interface. FERRITE— A powdered and compressed ferric oxide material that has both magnetic properties and light resistance to current flow. FET— Field-effect transistor. A voltage operated transistor. FF— Flip-flop. FHLT SYSTEMS— Force High-Level Terminal Sys- tems. FIBER OPTICS— Conductors or optical waveguides that readily pass light. FIFO— First-in, first-out. FILO— First-in, last-out. FIRMWARE— Program instructions stored in read- only memory (ROM) or programmable read- only memory (PROM). FIT— Fault isolation table. FLUX DENSITY— The number of magnetic lines of force passing through a given area. FLUX— In electrical or electromagnetic devices, a general term used to designate collectively all the electric or magnetic lines of force in a region. FM— Frequency modulation. FONT— A family or assortment of characters of a given size and style. FORMAT— The arrangement or layout of data in or on a data medium. FORTRAN— FORmula Translation programming language. fpi— Frames per inch. FREQUENCY— The number of complete cycles per second existing in any form of wave motion, such as the number of cycles per second of an alternating current. FTA— Fast-time analyzer. GAIN— Any increase or decrease in the strength of a signal. GPIB— General-Purpose Interface Bus. GRAY CODE— A binary code in which sequential numbers are represented by binary expressions, each of which differs from the preceding expression in one place only. Synonymous with reflected binary code. HARD COPY— A permanent copy of a display image that is portable and can be read by human beings. HARDWARE— Physical equipment as opposed to programs (software), procedures, rules, and documentation. AI-4
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HCMOS— High-speed complementary metal-oxide semiconductor. HEAD— A device that reads, writes, or erases data on a storage medium. HERTZ (Hz)— A unit of frequency equal to one cycle per second. HSP— High-speed printer. Hz— Hertz. I— Instruction. I/O— Input/output. I 2 L— Integrated injection logic (also IIL). IC— (1) Integrated circuit; (2) Intercomputer chan- nel. IC CHIPS— Integrated circuit chips ID— Input data. IDA—Input data acknowledge. IDC— (1) Integrated disk controller; (2) Insulation displacement connection. IDE— Integrated drive electronics. A fixed disk con- troller in which the controller is on the fixed disk drive electronics card. IDR— Input data request. IEEE— Institute for Electrical and Electronics En- gineers. IFF— Identification friend or foe. IIL— Integrated injection logic (also I 2 L). IMPACT PRINTER— A printer in which printing is the result of mechanical impacts. IN PHASE— The condition that exists when two or more signals of the same frequency pass through their minimum and maximum values of like polarity at the same instant. INDICATORS— Lights that show status of an operation or a selected item. INSTRUCTION— In a microprocessor or digital computer system, the information that tells the computer what to do. One step in a computer program. INT— Interrupt. INTELLIGENCE— In communications, any signal that conveys information. INTERFACE— The interconnecting devices, in- cluding wiring, data converters, switchboards, and so forth, that enable equipments to establish communication with other equipments or sys- tems. INTERRUPT— A method of stopping a process and identifying a certain condition exists. IOA— Input/output adapter. IOC— Input/output controller. IOCC— Input/output communications console. JFET— Junction field-effect transistor. JMP— Jump. JOTS— Joint Operation Tactical System. K— Kilobyte. KCMX (Keyset Central Multiplexer)— A data con- version and interface device. LAN— Local-area network. LANDS— Smooth areas of CD-ROM tracks that reflect the laser beam to a photodiode. LASER DIODE— A small laser beam generator employing a semiconductor junction as the active medium. LCC— Leadless chip carrier. LED— Light-emitting diode. AI-5
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LIFO— Last-in, first-out. LIGHT EMITTING DIODE (LED)— A diode that emits visible light when it is forward biased. Lin CMOS— Silicon gate metal-oxide semiconductor field-effect transistor (Trademark of Texas In- struments, Inc.). LINE PRINTER— A printer that prints data one line at a time. LP TTL-S— Low-power transistor-transistor logic- Schottky. LRU— Line replaceable unit. LSB— Least significant bit. LSI— Large scale integration. M— Megabyte. MAGNETIC INDUCTION— Generating a voltage in a circuit by the creation of relative motion between the magnetic field and the circuit. MAINTENANCE— Work done to correct, reduce, or to counteract wear, failure, and damage to equipment. MBR— Master boot record. MC— Master clear. MDD— Micro disk drive. MEMORY— Synonym for storage. MFM— Modified frequency modulation. A system of encoding data on a magnetic disk. MICROCONTROLLER— Synonym for microproc- essor. MICROELECTRONICS— The solid-state concept of electronics in which compact semiconductor materials are designed to function as an entire circuit or subassembly rather than as circuit components. MICROINSTRUCTION— An instruction of a microprogram. MICROPROCESSOR— An integrated circuit that accepts coded instructions at one or more terminals or ports, executes the instructions received, and delivers signals describing its progress. The instructions may be entered, integrated, or stored internally. MICROPROGRAM— A sequence of instructions executed by a microprocessor. MILITARY STANDARDS (MILSTD)— Standards of performance for components or equipment that must be met to be acceptable for military sys- tems. MIP— Maintenance index page. MIPS— Million instructions per second. MOS ICs— Contain parts comparable to discrete resistors (NMOS, PMOS, and FETS). Source acts as the emitter; gate acts as the base; and the drain acts as the collector. Controlled by voltage produced on the controlling terminal (gate). MOS— Metal-oxide semiconductor. Describes the structure in which this electric field is created—a metal gate, an oxide layer, and a semiconductor channel. MOSFET— MOS field-effect transistor. MPC— Microprogrammed controller. MRC— Maintenance requirement card. MS-DOS— Microsoft-Disk Operating System. MSB— Most significant bit. MSI— Medium-scale integration. MT— Main timing. MTIDC— Mass termination insulation displacement connection. MTI— Magnetic tape transport. AI-6
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MTU— Magnetic tape unit. N-FET— N-channel field-effect transistor. NDRO MEMORY— Nondestructive readout mem- ory. NEETS— Navy Electricity and Electronics Training Series. NIPS— Naval Intelligence Processing System. NLQ— Near letter quality. NMOS-N— channel metal-oxide semiconductor. NONIMPACT PRINTER— A printing device that does not mechanically impact the paper. NONVOLATILE STORAGE— A storage device whose contents are not lost when power is removed. NRZ— Non-return-to-zero recording method. NRZI— Non-return-to-zero indiscrete. NTDS— Naval Tactical Data System. NuBus— Simple 32-bit backplane bus (standard internal data bus). O— Operand. OA— Output acknowledge. OD— Output data. ODA— Output data acknowledge. ODR— Output data request. OFFLINE— Pertaining to the operation of a func- tional unit when not under the direct control of a computer. ONLINE— Pertaining to the operation of a funt- ional unit when under the direct control of a computer. OP CODE— Operation code. OP PROGRAM— Operational program. OTCIXS— Officer-in-Tactical-Command Information Exchange System. OUTPUT DATA— Data being delivered or to be delivered from a device or from a computer program. OUTPUT CHANNEL— A channel for conveying information from a device or logic element. P/TP— Power/temperature panel. PAGE PRINTER— A device that prints a whole page as an entity. PARITY CHECK— A check that tests whether the number of binary ONEs in an array of binary digits is odd or even. PBI— Pushbutton/indicator. PC— (1) Personal computer/microcomputer; (2) Printed circuit. PCB— Printed circuit board. PE— Phase encoding. PEAK VOLTAGE— The maximum value present in a varying or alternating voltage. This value may be positive or negative. PEFT— Peripheral equipment fictional test. PERIPHERAL DEVICE— With respect to a par- ticular processing unit, any equipment that can communicate directly with that unit. Synony- mous with peripheral unit. PGA— Pin grid array. PHOTODIODE— A diode that produces current by absorbing light. PI— Power interrupt. PITS— Depressions in a CD-ROM that causes the laser beam to defuse. PLCC— Plastic leadless chip carrier. AI-7
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PMOS— P-channel metal-oxide semiconductor. PMS— Planned Maintenance System. POFA— Programmed Operational Functional Anal- ysis. POST— Power-on self test. PPS— Primary power supply. PREVENTIVE MAINTENANCE— Maintenance performed specifically to prevent faults from occurring. PRF— Pulse-repetition frequency. PRINTER— An output device that produces a durable record of data in the form of a se- quence of discrete graphic characters belonging to a predetermined character set. PRO M— Programmable read-only memory. PRT— Pulse-repetition time. PS— Power supply. PW— Pulse width. QMOS— Quick metal-oxide semiconductor. RAC— Radar azimuth converter. RAM— Random access memory. RC— Resistance-capacitance. RC— Request control. RD— Read data. RDUC— Receive data from unit computer. RECORD— A set of related data or words treated as a unit. RAS— Refresh address strobe. REI— Requester extension interface. RFI— Radio frequency interference. RLL— Run length limited. A fixed disk controller and data encoding system that increases the density of data on the disk. ROCU— Remote operator control unit. ROM— Read-only memory. ROTOR— The rotating member of a synchro that consists of one or more coils of wires wound on a laminated core. Depending on the type of synchro, the rotor functions in a manner similar to the primary or secondary windings of a transformer. RS-232— Recommended standard 232. ANSI stand- ard serial interface. RS— Recommended standard. RTC— Real-time clock. RTS— Request to send. RZ— Return-to-zero recording method. S/D— Synchro-to-digital. SCSI— Small computer systems interface. SDC— Signal data converter. SEEK— To selectively position the access mechan- ism of a direct access device. SEM— Standard electronic module. SEM CHASSIS— Standard electronic module chassis. SERIAL— An occurrence of events, such as pulses, in a timed sequence rather than simultaneously. SERIAL PRINTER— Synonym for character printer; prints one character at a time. SERVO SYSTEM— An automatic feedback control system that compares a required condition with an actual condition and uses the difference to adjust a control device to achieve the desired condition. SIMMs— Single inline memory modules. AI-8
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SIPPs— Single inline pin package. SIPs— Single inline package SNAP I, II, AND III SYSTEMS— Shipboard Non- tactical ADP Program I, II and III Systems. SOFTWARE— Programs, procedures, rules, and documentation pertaining to the operation of a computer system. SOIC— Small-outline integrated circuit. SOM— System operating manual. SPS— Standby power supply. SRAM— Static random access memory. SSI— Small-scale integration. ST-506— A fixed disk interface system. SYNC— Synchronous. SYNCHRO— A small motorlike analog device that operates like a variable transformer and is used primarily for the transmission of data among analog equipments and stations. TDUC— Transmit data from unit computer. TFCC— Tactical Flag Command Center. TO— Transistor-outline. TRISTATE— Output configuration capable of as- suming three output states: high, low, and high impedance (open). TTL— Transistor-transistor logic. TTL-H— Transistor-transistor logic-high-speed. TTL-S— Transistor-transistor logic-Schottky. TTLC— Bipolar transistor-transistor logic series in CMOS technology. TTY— Teletype. TVM— Time volatile memory. UART— Universal asynchronous receiver/transmitter. UNIX— An operating system developed by AT&T (Trademark of AT&T). UPS— Uninterruptible power supply. USART— Universal synchronous/asynchronous receiver transmitter. USRT— Universal synchronous receiver transmitter. UV— Ultraviolet. UV EPROM— Ultraviolet-erasable PROM. VF— Vacuum fluorescent. VLSI— Very large-scale integration. VMB— Virtual memory board. VOS— Virtual operating system. WD— Write data. AI-9
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APPENDIX II REFERENCES USED TO DEVELOP THE TRAMAN NOTE: Although the following references were current when this TRAMAN was published, their continued currency cannot be assured. Therefore, you need to be sure that you are studying the latest revision. Chapter 1 Combat System Technical Operations Manual (CSTOM) for DDG-993 Class (U), Combat System Readiness, NAVSEA S9DDG-7C-CSM-050/(U), DDG-993, CL, Vol 3, Part 1, Naval Sea Systems Command, Washington, D.C., 1982. Computer Science Source Book, The McGraw-Hill Science Reference Series, McGraw-Hill, New York, N.Y., 1988. Data Processing Technician 2, NAVEDTRA 12511, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1991. Data Systems Technician 3 & 2, NAVEDTRA 10231, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1987. Department of the Navy Information and Personnel Security Program Regulation, OPNAVINST 5510.1, Chief of Naval Operations, Washington, D.C., 1991. Department of the Navy Security Program for Automatic Data Processing Systems, OPNAVINST 5239.1, Chief Naval Operations, Washington, D.C., 1985. Electronics Installation and Maintenance Books, Electromagnetic Interference Reduction, NAVSHIPS 0967-LP-000-0150, Naval Sea Systems Command, Washington, D.C., 1980. Electromagnetic Radiation Hazards (U), (Hazards to Ordnance, [U]) NAVSEA OP 3565, NAVAIR 16-l-529/NAVELEX 0967-LP-624-6010, Vol 1, Naval Sea Systems Command, Washington, D. C., 1979. Electromagnetic Radiation Hazards (U), (Hazards to Ordnance, [U]) NAVSEA OP 3565, NAVAIR 16-l-529/NAVELEX 0967-LP-624-6010, Vol 2, Naval Sea Systems Command, Washington, D.C., 1989. Electronics Technician, 1 & C, NAVEDTRA 10292-F, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1987. AII-1
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Handbook of Shipboard Electromagnetic Shielding Practices, S9407-AB- HBK-010, Naval Sea Systems Command, Washington, D.C., 1989. Levine, Sy, Integrated Circuits and Computer Concepts, Electro-Horizons Publications, Plainview, N.Y., 1989. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. Navy Electricity and Electronics Training Series, Introduction to Digital Computers, Module 22, NAVEDTRA B72-22-00-88, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1988. Shipboard Bonding, Grounding, and Other Techniques for Electromagnetic Compatibility and Safety, MIL-STD-1310E(NAVY), Naval Sea Systems Command, Washington, D. C., 1987. System Coordinator Manual, AN/UYK-62(V), SE610-GV-OPl-610/UYK- 62(V), Naval Sea Systems Command, Washington, D.C., 1985. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1986. Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UYK43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. Chapter 2 Baker, Charles H., John C. Bellamy, John L. Fike, George E. Friend, Under- standing Data Communications, Howard W. Sams and Co., Indianapolis, Ind., 1984. Connectors and Jacketed Cable, Electric, Selection Standard for Shipboard Use, MIL-STD-1683B, Naval Sea Systems Command, Washington, D.C., 1987. Derfler, Frank J., Jr., “Connectivity,” 2d ed, PC Magazine, Ziff Davis Press, Emeryville, Calif., 1992. Digital Time Division Command/Response Multiplex Data Base, MIL-STD- 1553B, Naval Sea Systems Command, Washington, D.C., 1986. Electronical Connectors, Plug-In Sockets and Associated Hardware Selections and Use of, MIL-STD-1353B, Naval Sea Systems Command, Washington, D.C., 1980. Electronics Installation and Maintenance Books, Installation Standard, NAVSEA 0967-LP-000-0110, Naval Sea Systems Command, Washington, D.C., 1977. AII-2
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General Requirements for Electrontic Equipment Specifications, MIL-STD-2036, Naval Sea Systems Command, Washington, D.C., 1991. Encyclopedia of Electronics, Stan Gibilisco and Neil Sclater, Eds., 2d ed., Tab Books, Blue Ridge Summit, Penn., 1990. Hecht, Jeff, Understanding Fiber Optics, Howard W. Sams and Co., Indianapolis, Ind., 1987. Input/Output Interfaces, Standard Digital Data, Navy Systems, MIL-STD 1397B (Navy), Naval Sea Systems Command, Washington, D.C., 1989. Maintenance Manual for Computer Set AN/UYK-7(V), VOl 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 2, SE610-AW- MMA-020, Naval Sea Systems Command, Washington, D.C., 1990. Microcomputer Software and Hardware Guidelines, MIL-HDBK-805(OM), Naval Sea Systems Command, Washington, D.C., 1990. Mueller, Scott, Upgrading and Repairing PCs, Que Corporation, Carmel, Ind., 1988. Naval Ships Technical Manual (NSTM), S9086-RQ-STM-000, Chapter 510, Ventilating Heating Cooling and Air Conditioning Systems for Surface Ships, Naval Sea Systems Command, Washington, D.C., 1977. Naval Ships Technical Manual (NSTM), S9086-SD-STM-000, Chapter 532, Liquid Cooling Systems for Electronic Equipment, Naval Sea Systems Command, Washington, D.C., 1978. Naval Shore Electronics Criteria, Digital Computer Systems, Vol 1 of 2, SPAWAR 0280-LP-900-9000, Naval Electronics Systems Command, Washington, D.C., 1972. Naval Shore Electronics Criteria, Digital Computer Systems, Vol 2 of 2, SPAWAR 0280-LP-901-3000, Naval Electronics Systems Command, Washington, D.C., 1972. Naval Shore Electronics Criteria, Naval Security Group Elements Design and Performance, SPAWAR 0280-LP-900-6000, Space and Naval Warfare System Command, Washington, D.C., 1973. Naval Shore Electronics Criteria, SPAWAR 0280-LP-900-8000, Installation Standard and Practices, Space and Naval Warfare System Command, Washington, D.C., 1977. Navy Electricity and Electronics Training Series, Introduction to Circuit Protection, Control, and Measurement, Module 3, NAVEDTRA 172-03-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. AII-3
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Navy Electricity and Electronics Training Series, Introduction to Electrical Conductors, Wiring Techniques, and Schematic Reading, Module 4, NAVEDTRA 172-04-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1984. Navy Electricity and Electronics Training Series, Technician’s Handbook, Module 19, NAVEDTRA 172-19-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. Navy Electricity and Electronics Training Series, Introduction to Fiber Optics, Module 24, NAVEDTRA B72-24-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Organizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-010/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Organizational Level Maintenance Manual, Vo1 2, AN/UYK-62(V), SE610- GV-MMO-020/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Servicing Tools for Electric Contacts and Connections, Selection and Use of, MIL-STD-1646, Naval Sea Systems Command, Washington, D.C., 1983. System Coordinator Manual, AN/UYK-62(V), SE610-GV-OP1-610/UYK- 62(V), Naval Sea Systems Command, Washington, D.C., 1985. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1986. Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Technical Manual, Operation and Maintenance with Parts List, Data Processing Set, AN/UYK-20(V), Vol 1, Naval Sea Systems Command, Washington, D.C., 1990. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. Z248 Systems Administrator, Zenith Data Systems Corporation, St. Joseph, Mich., 1988. Chapter 3 Data Processing Technician 2, NAVEDTRA 12511, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1991. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. AII-4
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Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. Organizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-010/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Organizational Level Maintenance Manual, Vol 2, AN/UYK-62(V), SE610- GV-MMO-020/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. System Coordinator Manual, AN/UYK-62(V), SE610-GV-OPl-610/UYK- 62(V), Naval Sea Systems Command, Washington, D.C., 1985. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1987. Technical Manual, Operation and Maintenance Instuctions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Chapter 4 Cannon, Don L., Gerald Luecke, Understanding Microprocessors, Howard W. Sams and Co., Indianapolis, Ind., 1984. Electronics Installation and Maintenance Books, Test Methods and Practices, NAVSEA 0967-LP-000-130, Naval Sea Systems Command, Washington, D.C., 1980. IEEE Standard for Logic Circuit Diagram, ANSI/IEEE Std. 991-1986, The Institute of Electrical and Electronics Engineers, New York, N.Y., 1986. IEEE Standard Graphic Symbols for Logic Functions, ANSI/IEEE Std 91-1984, Institute of Electrical and Electronics Engineers, Inc., New York, N.Y., 1984. Interface Standards for Shipboard Systems, Electrical Power Alternating Current (Metric), Section 300A, MIL-STD-1399 (Navy), Naval Sea Systems Command, Washington, D.C., 1992. Lancaster, Don, TTL Cookbook, Howard W. Sams and Co., Indianapolis, Ind., 1974. Levine, Sy, Integrated Circuits and Computer Concepts, Electro-Horizons Publications, Plainview, N.Y., 1989. AII-5
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List of Standard Microcircuits, MIL-STD-1562C, Naval Sea Systems Com- mand, Washington, D.C., 1981. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. McWhorter, Gene, Understanding Digital Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1984. Microcircuits, General Specifications For Military Specification, MIL-M-38510H, Rome Air Development Center, Griffis Air Force Base, N.Y., 1990. Navy Electricity and Electronics Training Series, Introduction to Generators and Motors, Module 5, NAVEDTRA 172-05-00-79, Naval Education and Training Program Development Center, Pensacola, Fla., 1979. Navy Electricity and Electronics Training Series, Introduction to Elec- tronic Emission, Tubes, and Power Supplies, Module 6, NAVEDTRA B72-06-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Navy Electricity and Electronics Training Series, Introduction to Solid- State Devices and Power Supplies, Module 7, NAVEDTRA B72-07-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Navy Electricity and Electronics Training Series, Introduction to Amplifiers, Module 8, NAVEDTRA 172-08-00-82, Naval Education and Training Program Development Center, Pensacola, Fla., 1982. Navy Electricity and Electronics Training Series, Introduction to Wave- Generation and Wave-Shaping Circuits, Module 9, NAVEDTRA 172-09-00-83, Naval Education and Training Program Development Center, Pensacola, Fla., 1983. Navy Electricity and Electronics Training Series, Introduction to Number Systems and Logic Circuits, Module 13, NAVEDTRA B72-13-00-86, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1986. Navy Electricity and Electronics Training Series, Introduction to Micro- electronics, Module 14, NAVEDTRA 172-14-00-84, Naval Education and Training Program Development Center, Pensacola, Fla., 1984. Navy Electricity and Electronics Training Series, Technician’s Handbook, Module 19, NAVEDTRA 172-19-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. AII-6
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Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Tolkheim, Roger L., Digital Electronics, 2d ed, McGraw-Hill, New York, N.Y., 1984. Understanding Advanced Solid State Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1986. Understanding Solid State Electrontics, 4th ed, Howard W. Sams and Co., Indianapolis, Ind., 1984. Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. Z248 Systems Administrator, Zenith Data Systems Corporation, St. Joseph, Mich., 1988. Chapter 5 Cannon, Don L., Gerald Luecke, Understanding Microprocessor, Howard W. Sams and Co., Indianapolis, Ind., 1984. Chips, “Cache Memory, The Key to High Performance Personal Computers,” Department of the Navy, Washington, D.C., Jan 1992. Computer Science Source Book, The McGraw-Hill Science Reference Series, McGraw-Hill, New York, N.Y., 1988. Encyclopedia of Electronics, Stan Gibilisco and Neil Sclater, Eds., 2d cd., Tab Books, Blue Ridge Summit, Penn., 1990. Fink, Donald G., Donald Christiansen, eds., Electrons Engineers’Handbook, 3d cd., McGraw-Hill, New York, N.Y., 1989. Levine, Sy, Integrated Circuits and Computer Concepts, Electro-Horizons Publications, Plainview, N.Y., 1989. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. AII-7
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McWhorter, Gene, Understanding Digital Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1984. Military Standard, General Requirements for Electrontic Equipment Specifica- tions, MIL-STD-2036, Naval Sea Systems Command, Washington, D.C., 1991. Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, SYBEX, Inc., Alameda, Calif., 1991. Mueller, Scott, Upgrading and Repairing PCs, Que Corporation, Carmel, Ind., 1988. Navy Electricity and Electronics Training Series, Introduction to Solid-State Devices and Power Supplies, Module 7, NAVEDTRA B72-07-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Navy Electricity and Electronics Training Series, Introduction to Amplifiers, Module 8, NAVEDTRA 172-08-00-82, Naval Education and Training Program Development Center, Pensacola, Fla., 1982. Navy Electricity and Electronics Training Series, Introduction to Wave- Generation and Wave-Shaping Circuits, Module 9, NAVEDTRA 172- 09-00-83, Naval Education and Training Program Development Center, Pensacola, Fla., 1983. Navy Electricity and Electronics Training Series, Introduction to Number Systems and Logic Circuits, Module 13, NAVEDTRA B72-13-00-86, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1986. Navy Electricity and Electronics Training Series, Introduction to Micro- electronics, Module 14, NAVEDTRA 172-14-00-84, Naval Education and Training Program Development Center, Pensacola, Fla., 1984. Navy Electricity and Electronics Training Series, Technician’s Handbook, Module 19, NAVEDTRA 172-19-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. Navy Electricity and Electronics Training Series, Introduction to Digital Computers, Module 22, NAVEDTRA B72-22-00-88, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1988. Oganizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-010/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1987. AII-8
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Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Technical Manual, Operation and Maintenance with Parts List, Data Processing Set, AN/UYK-20(V), Vol 1, Naval Sea Systems Command, Washington, D.C., 1990. Understanding Computers, Computer Basics, Alexandria, Va., 1985. Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. 2248 Systems Administrator, Zenith Data Systems Corporation, St. Joseph, Mich., 1988. Chapter 6 Cannon, Don L., Gerald Luecke, Understanding Microprocessors, Howard W. Sams and Co., Indianapolis, Ind., 1984. Computer Science Source Book, The McGraw-Hill Science Reference Series, McGraw-Hill, New York, N.Y., 1988. Data Systems Technician 3 & 2, NAVEDTRA 10231, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1987. Fink, Donald G., Donald Christiansen, eds., Electrons Engineers’Handbook, 3d cd., McGraw Hill, New York, N.Y., 1989. Gibilisco, Stan, Neil Sclater, Eds., Encyclopedia of Electrons, 2d cd., Tab Books, Blue Ridge Summit, Penn., 1990. Levine, Sy, Integrated Circuits and Computer Concepts, Electro-Horizons Publications, Plainview, N.Y., 1989. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK7(V), “Circuit Diagrams,” Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. McWhorter, Gene, Understanding Digital Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1984. Microcomputer Software and Hardware Guidelines, MIL-HDBK-805(OM), Naval Sea Systems Command, Washington, D.C., 1990. AII-9
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Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, SYBEX, Inc., Alameda, Calif., 1991. Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, Fourth Edition, SYBEX, Inc., Alameda, Calif., 1995. Mueller, Scott, Upgrading and Repairing PCs, Que Corporation, Carmel, Ind., 1988. Mueller, Scott, Upgrading and Repairing PCs, Fifth Edition, Que Corporation, Carmel, Ind., 1995. Navy Electricity and Electronics Training Series, Introduction to Solid-State Devices and Power Supplies, Module 7, NAVEDTRA B72-07-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Navy Electricity and Electronics Training Series, Introduction to Amplifiers, Module 8, NAVEDTRA 172-08-00-82, Naval Education and Training Program Development Center, Pensacola, Fla., 1982. Navy Electricity and Electronics Training Series, Introduction to Wave-Generation and Wave-Shaping Circuits, Module 9, NAVEDTRA 172-09-00-83, Naval Education and Training Program Development Center, Pensacola, Fla., 1983. Navy Electricity and Electronics Training Series, Introduction to Number Systems and Logic Circuits, Module 13, NAVEDTRA B72-13-00-86, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1986. Navy Electricity and Electronics Training Series, Introduction to Micro- electronics, Module 14, NAVEDTRA 172-14-00-84, Naval Education and Training Program Development Center, Pensacola, Fla., 1984. Navy Electricity and Electronics Training Series, Technician Handbook, Module 19, NAVEDTRA 172-19-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. Organizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-010/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1987. Technical Manual, Operation and Maintenance Instuctions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. AII-10
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Technical Manual, Operation and Maintenance with Parts List, Data Processing Set, AN/UYK-20(V), Vol 1, Naval Sea Systems Command, Washington, D.C., 1990. Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. Z248 Systems Administrator, Zenith Data Systems Corporation, St. Joseph, Mich., 1988. Chapter 7 Baker, Charles H., John C. Bellamy, John L. Fike, George E. Friend, Under- standing Data Communications, Howard W. Sams and Co., 1984. Cannon, Don L., Gerald Luecke, Understanding Microprocessors, Howard W. Sams and Co., Indianapolis, Ind., 1984. Computer Science Source Book, The McGraw-Hill Science Reference Series, McGraw-Hill, New York, N.Y., 1988. Derfler, Frank J., Jr., “Connectivity,” 2d ed, PC Magazine, Ziff Davis Press, Emeryville, Calif., 1992. Digital Time Division Command/Response Multiplex Data Base, MIL- STD-1553B, Naval Sea Systems Command, Washington, D.C., 1978. Electronical Connectors, Plug-In Sockets and Associated Hardware Selections and Use of, MIL-STD-1353B, Naval Sea Systems Command, Washington, D.C., 1980. Encyclopedia of Electronics, Stan Gibilisco and Neil Sclater, Eds., 2d cd., Tab Books, Blue Ridge Summit, Penn., 1990. Fink, Donald G., Donald Christiansen, eds., Electronics Engineers’ Handbook, 3d ed., McGraw-Hill, New York, N.Y., 1989. General Requirements for Electronic Equipment Specifications, MIL-STD-2036, Naval Sea Systems Command, Washington, D.C., 1991. Hecht, Jeff, Undemanding Fiber Optics, Howard W. Sams and Co., Indianapolis, Ind., 1987. Input/Output Interfaces, Standard Digital Data, Navy Systems, MIL-STD 1397B (Navy), Naval Sea Systems Command, Washington, D.C., 1989. Levine, Sy, Integrated Circuits and Computer Concepts, Electro-Horizons Publications, Plainview, N.Y., 1989. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. AII-11
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Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams: Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. McWhorter, Gene, Understanding Digital Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1984. Microcomputer Software and Hardware Guidelines, MIL-HDBK-805(OM), Naval Sea Systems Command, Washington, D.C., 1990. Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, SYBEX, Inc., Alameda, Calif., 1991. Minasi, Mark, The Complete PC Upgade and Maintenance Guide, Fourth Edition, SYBEX, Inc., Alameda, Calif., 1995. Mueller, Scott, Upgrading and Repairing PCs, Que Corporation, Carmel, Ind., 1988. Mueller, Scott, Upgrading and Repairing PCs, Fifth Edition, Que Corporation, Carmel, Ind., 1995. Navy Electricity and Electronics Training Series, Introduction to Solid- State Devices and Power Supplies, Module 7, NAVEDTRA B72-07-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Navy Electricity and Electronics Training Series, Introduction to Amplifiers, Module 8, NAVEDTRA 172-08-00-82, Naval Education and Training Program Development Center, Pensacola, Fla., 1982. Navy Electricity and Electronics Training Series, Introduction to Wave- Generation and Wave-Shaping Circuits, Module 9, NAVEDTRA 172-09-00-83, Naval Education and Training Program Development Center, Pensacola, Fla., 1983. Navy Electricity and Electronics Training Series, Introduction to Number Systems and Logic Circuits, Module 13, NAVEDTRA B72-13-00-86, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1986. Navy Electricity and Electronics Training Series, Introduction to Micro- electronics, Module 14, NAVEDTRA 172-14-00-84, Naval Education and Training Program Development Center, Pensacola, Fla., 1984. Navy Electricity and Electronics Training Series, Technician’s Handbook, Module 19, NAVEDTRA 172-19-00-85, Naval Education and Training Program Development Center, Pensacola, Fla., 1985. AII-12
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Navy Electricity and Electronics Training Series, Introduction to Fiber Optics, Module 24, NAVEDTRA B72-24-00-92, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1992. Organizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-010/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1987. Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Technical Manual, Operation and Maintenance with Parts List, Data Processing Set, AN/UYK-20(V), Vol 1, Naval Sea Systems Command, Washington, D.C., 1990. Understanding Advanced Solid State Electronics, Howard W. Sams and Co., Indianapolis, Ind., 1986. UnderstandingSolid State Electrontics, Howard W. Sams and Co., Indianapolis, Ind., 1984. Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. WHISPERNET User’s Guide, Document No. 10133538, Rev. 1, Fiber Com, Inc., Roanoke, Va., 1978. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. Z248 Systems Administrator, Zenith Data Systems Corporation, St. Joseph, Mich., 1988. Chapter 8 Cannon, Don L., Gerald Luecke, Understanding Microprocessor, Howard W. Sams and Co., Indianapolis, Ind., 1984. Computer Science Source Book, The McGraw-Hill Science Reference Series, McGraw-Hill, New York, N.Y., 1988. Data Processing Technician 2, NAVEDTRA 12511, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1991. Maintenance Manual for Computer Set AN/UYK-7(V), Vol 1, SE610-AW- MMA-010, Naval Sea Systems Command, Washington, D.C., 1990. AII-13
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Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 1, SE610-AW-MMA-030, Naval Sea Systems Command, Washington, D.C., 1990. Maintenance Manual for Computer Set AN/UYK-7(V), “Circuit Diagrams,” Vol 3, Part 2, SE610-AW-MMA-040, Naval Sea Systems Command, Washington, D.C., 1990. Microcomputer Software and Hardware Guidelines, MIL-HDBK-805(OM), Naval Sea Systems Command, Washington, D.C., 1990. Operating Procedures for Computer Set AN/UYK-7(V) Diagnostic Program, Part 4, NAVSEA 0967-LP-024-5454, Naval Sea Systems Command, Washington, D.C., 1989. Navy Electricity and Electronics Training Series, Introduction to Amplifiers, Module 8, NAVEDTRA 172-08-00-82, Naval Education and Training Program Development Center, Pensacola, Fla., 1982. Navy Electricity and Electronics Training Series, Introduction to Wave- Generation and Wave-Shaping Circuits, Module 9, NAVEDTRA 172-09-00-83, Naval Education and Training Program Development Center, Pensacola, Fla., 1983. Navy Electricity and Electronics Training Series, Introduction to Number Systems and Logic Circuits, Module 13, NAVEDTRA B72-13-00-86, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1986. Operating Procedures for Computer Set AN/UYK-7(V) Diagnostic Programs, Parts 1-3, NAVSEA 0967-LP-024-5454, Naval Sea Systems Command, Washington, D.C., 1989. Organizational Level Maintenance Manual, Vol 1, AN/UYK-62(V), SE610- GV-MMO-020/UYK-62(V), Naval Sea Systems Command, Washington, D.C., 1989. Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Design Data for Data Processing Set, AN/UYK-44V, SE610-PV-MMV-010, Naval Sea Systems Command, Washington, D.C., 1987. Technical Manual, Operation and Maintenance Instructions for Computer Set AN/UYK-43/V, SE610-NV-MMO-010/UYK-43(V), Naval Sea Systems Command, Washington, D.C., 1990. Technical Summary Handbook, AN/UYK 7, NAVSEA 0967-LP-024-5800, Naval Sea Systems Command, Washington, D.C., 1986 UNISYS, AN/UYK-43, Abbreviated Reference Manual, Naval Sea Systems Command, Washington, D.C., 1986. AII-14
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Walker, Roger S., Understanding Computer Science, Howard W. Sams and Co., Indianapolis, Ind., 1984. Z-248 Maintenance, (Part 1), Navy Regional Data Automation Center, Norfolk, Va., 1989. Chapter 9 Data Processing Technician Third Class, NAVEDTRA 10263, Naval Education and Training Program Support Activity, Pensacola, Fla., 1987. Navy Electricity and Electronics Training Series, Magnetic Recording Mod- ule 23, NAVEDTRA B72-23-00-91, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1991. Technical Manual for Type 1840 Modified Magnetic Tape Subsystem, RD- 358(V)/UYK, NAVSEA 0967-LP-562-8020, Naval Sea Systems Command, Washington, D.C., 1983. Chapter 10 Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, SYBEX Inc., Alameda, Calif., 1991. Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, Fourth Edition, SYBEX, Inc., Alameda, Calif., 1995. Minasi, Mark, The Hard Disk Survival Guide, SYBEX Inc., Alameda, Calif., 1991. Mueller, Scott, Que’s Guide to Data Recovery, Que Corporation, Carmel, Ind., 1991. Mueller, Scott, Upgrading and Repairing PCs, Que Corporation, Carmel, Ind., 1988. Mueller, Scott, Upgrading and Repairing PCs, Fifth Edition, Que Corporation, Carmel, Ind., 1995. Navy Electricity and Electronics Training Series, Magnetic Recording, Mod- ule 23, NAVEDTRA B72-23-00-91, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1991. Navy Electricity and Electronics Training Series, Principles of Synchros, Servos, and Gyros, Module 15, NAVEDTRA 172-15-00-85, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1985. Operation and Maintenance Instructions for Recorder-Reproducer Set, Magnetic Disk AN/UYH-3(V), NAVSEA SE600-AA-MMM-010/AN/UYH-3(V), Naval Sea Systems Command, Washington, D.C., 1988. Programmer Reference Manual for Recorder-Reproducer Set, Magnetic Disk AN/UYH-3(V), NAVSEA SE600-AA-MMM-040/AN/UYH-3(V), Naval Sea Systems Command, Washington, D.C., 1985. AII-15
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Seidman Arthur and Ivan Flores, eds., The Handbook of Computers and Computing, Van Nostrand Reinhold Co., New York, N.Y., 1984. Technical Manual, Disk Memory Set, AN/UYH-2(V), Vol.1, NAVSEA SE600- CV-MMO-010/UYH-2(V), Naval Sea Systems Command, Washington, D.C., 1991. Chapter 11 Brewer, Bryan and Young Key, The Compact Disc Book, Harcourt Brace Jovanovich, Orlando, Fla., 1987. Budding, Laura and Elizabeth Young, The Brady Guide To CD-ROM, Prentice Hall Press, New York, N.Y., 1987. PC/Computing Magazine, “Safe and Speedy Storage,” Volume 6, Number 6, Ziff-Davis Publishing Co., New York, N.Y., June 1993. Chapter 12 Bigelow, Stephen J., Maintain & Repair Your Computer Printer and Save a Bundle, Windcrest Books, Blue Ridge Summit, Penn., 1992. LaBadie, Horace W. Jr., Build Your Own Postscript® Laser Printer and Save a Bundle, Windcrest Books, Blue Ridge Summit, Penn., 1991. Minasi, Mark, Maintaining Upgrading and Troubleshooting IBM PCs, Com- patibles, and PS/2 Personal Computers, COMPUTE! Publications Inc., Greensboro, N.C., 1990. Minasi, Mark, The Complete PC Upgrade and Maintenance Guide, SYBEX Inc., Alameda, Calif., 1991. Operation, Maintenance, and Installation Instructions for TT-624(V), SPAWAR EE161-NA-OMI-010/El10-TT624, Space and Naval Warfare Systems Command, Washington, D.C., 1991. Operation and Maintenance Manual with Parts List for Printer-Plotter PT549(V)1/U, NAVSEA SE630-AC-OMP-010~T549(V)1/U, Naval Sea Systems Command, Washington, D.C., 1990. Chapter 13 Digital Data Converter CV-2036/USQ-20(V) or Keyset Central Multiplexer (KCMX) Technical Manual, NAVSEA 0967-LP-051-5110, Naval Sea Systems Command, Washington, D.C., 1968. Navy Electricity and Electronics Training Series, Introduction to Matter, Energy and Direct Current, Module 1, NAVEDTRA 172-01-00-88, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1988. Navy Electricity and Electronics Training Series, Principles of Synchros, Servos, and Gyros, Module 15, NAVEDTRA 172-15-00-85, Naval Education and Training Program Management Support Activity, Pensacola, Fla., 1985. AII-16
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Signal Data Converter Group, CV-2953A (P)/UYK, Desctiption, Operation, and Maintenance, Vol. 1, NAVSEA 0967-LP-581-9010, Naval Sea Systems Command, Washington, D.C., Oct 1974. Technical Manual, Description, Operation and Maintenance Combat Direction System, Digital Fire Control Switchboard Mk-70 Mod 13 and Computer Switching Control Panels Mk-328 Mod 11 CG 16 Class, Vol. 1, NAV- SEA SC675-AG-MMO-010/CG, 16CL, Naval Sea Systems Command, Washington, D.C., Apr 1986; Vol. 2, NAVSEA SC675-AG-MMO- 020/CG, 16CL, Naval Sea Systems Command, Washington, D.C., Apr 1986. Technical Manual for Digital Data Signal Dhttiution Switchboard, SB-1299/ USQ-20(V), SB-1299A/USQ-20(V), and SB-1299B/USQ-20(V), NAV- SHIPS 0967-224-4010, Naval Sea Systems Command, Washington, D.C., Jan 1967. Technical Manual for Digital-to-Signal Distribution Switchboard, SB-1299/ USQ-20(V), SB-1299~SQ-20(V), and SB-1299B/USQ-20(V), NAV- SHIPS 0967-224-4010, Naval Sea Systems Command, Washington, D.C., Jan 1967. Technical Manual for Electronic Equipment Mounting Base MT-3574B USQ-20(V), NAVSHIPS 0967-306-8010, Naval Sea Systems Command, Washington, D.C., Nov 1980. AII-17
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p. 381
INDEX A A/D converters, 4-20 ABT, 4-30 Access direct memory, 7-16 time, 6-2 Accumulator (register), 5-6 Acknowledge external function, 7-33 input data, 7-33 output data, 7-33 signal, 7-32 Adder and subtracter circuits, 4-12 Address bus, 5-24 pointers, buffer, 7-14 translation memory, 6-6 Addressing operands direct, 8-10 extended, 8-11 immediate, 8-11 implicit, 8-11 indexed, 8-11 indirect, 8-12 instruction, 8-10 relative, 8-12 task state instruction, 5-10 ADP security, 1-14 Alarms, audible, 3-2 ALU timing, 5-19 Amplifiers dc, 4-19 sense, 4-21, 6-13, 6-20 Analog signal conversion circuits, 4-19 to digital converters, 4-20, 13-3 Analog switchboards, 13-35 ANSI X3.131,7-23 Applications programs, 8-3 Architecture cable, 2-23 connector, 2-15 memory, 6-4 Arithmetic logic unit, 5-18 operations, 5-20 Arrays, 6-16 Assembly/chassis layout, 2-4 ASW systems, 1-8 Asynchronous data exchanges, 7-28 Automatic bus transfers, 4-30 B Backplane/motherboard layout, 2-6 Backup power, 4-29 BAP, 7-13 Basic input/output system, 5-18 Battery-protected storage, 8-17 Battle short mode operation, 1-13 BCW, 7-13 Binary angular measurement (BAM), 13-4 Binary-coded decimal, 13-4 BIOS, 5-18 Bipolar ICs, 4-7 Bit, 4-24 Boards, printed circuit, 2-13 Boolean algebra, 4-4 Boot/bootstrap procedure, 5-18 mainframe computer, 8-25 microcomputer, 8-19 minicomputer, 8-22 Breakers, circuit, 3-2 Buffer address pointers, 7-13 control words, 7-13 transmit, 7-21 Bus address, 5-24 computer interconnection system, 5-25 control, 5-24 data, 5-24 direct memory interface, 5-26 I/O MEM bus, 5-25 input/output controller, 5-25 instruction, 5-25 operand, 5-25 time multiplexed, 5-26 Buses, 5-1 INDEX-1
p. 382
operations, 5-26 types, 5-24 Busy signal, 7-32 Byte, 4-24 C Cabinets/frames (See frames/cabinets) Cables, 2-15 architecture, 2-25 coaxial, 2-25 connectors, 2-15 fiber optic, 2-25 flat, 2-24 input, 7-33 output, 7-33 ribbon, 2-24 single, 7-32 twisted/multiconductor, 2-25 Cache memory, 5-15 Cage/rack frames/cabinets, 2-10 Capabilities, operational, 1-13 Capacity, memory, 6-1 Card cage/rack layout, 2-4 Cartridge magnetic tape devices, 9-18 CD-ROM, 11-1 applications, 11-6 data storage structure, 11-2 physical characteristics, 11-2 CD-ROM drives, 11-4 CD controller, 11-6 interface section, 11-6 optical head, 11-4 turntable, 11-6 Central processing unit, 5-1 arithmetic and logic unit (ALU), 5-18 control section, 5-2 Centronics parallel, 7-27 Chain address pointer, 7-13 Chaining, daisy, 7-17 Chaining instructions, 7-10 Channel control, 7-14 Character-addressable instructions, 8-12 Character printers, 12-9 daisy wheel printers, 12-10 dot matrix printers, 12-9 Character sets, 12-2 alternate character sets, 12-3 ASCII character set, 12-2 Chassis/assembly frames/cabinets, 2-8 layout, 2-4 Check, parity, 6-7 Circuit analog signal conversion, 4-20 boards, printed, 2-13 breakers, 3-2 integrated, regulator, 4-20 line driver/receiver integrated, 4-21 read/write cycle, 6-20 regulator integrated, 4-20 Circuits, 4-1, 4-4, 4-5 adder/subtracter, 4-12 code converter, 4-11 data routing, 4-12 digital ICs, 4-7 digital logic, 4-4, 4-9, 4-10 driver integrated, 4-19 general linear, 4-19 I/O, 7-13 integrated (ICs), 4-5, 4-7 memory interface, 6-4 sequencing, 7-13 systems interface, 4-21 timing, 4-22,6-7,7-12 CIS, 5-25 Class I through IV interrupts, 5-12 Clear/set flag, 7-14 Clock master, 5-4 monitor, 5-5 multiple phase, 4-23 real-time, 5-5 single phase, 4-23 Coaxial cables, 2-25 Codes converter circuits, 4-11 Hamming, 6-8 interrupt, 5-13 operation, 8-7 Combinational digital logic circuits, 4-4, 4-9 Command instructions, 7-10 signals (enables), 4-13 Comparators, 4-13, 4-20 Compensators, 4-29 INDEX-2
p. 383
Components, 4-1 circuits, 4-4 interfacing, 7-19 number systems, 4-2 physical layouts, 2-3, 2-6 Computers central processing units and buses, 5-1 components and circuits, 4-1 configurations and hardware, 2-1 fundamentals and operations, 1-1 input/output and interfacing, 7-1 instructions and man/machine interfaces, 8-1 memories, 6-1 operator controls and controlling units, 3-1 types of, 1-3 Computer switching and control panel (CSCP), 13-33 Computer viruses, 10-29 Conditioners, line, 4-29 Configurations, 1-9, 2-1 block diagrams, 2-1 hardware, 1-10 layouts, 2-2, 2 -4, 2-6 mainframe computer, 8-23 microcomputer, 8-16 minicomputer, 8-20 software, 1-10 Connectors, 2-15 architectures, 2-15 cables, 2-15 external, 2-21 internal, 2-18 Consoles maintenance, 3-10 remote, 3-13 Control and maintenance panels, 3-8 Control memory, 5-15 operations, 7-15 Control section, 5-2 cache memory, 5-15 control memory, 5-15 instruction and control, 5-6 instruction operand addressing, 5-10 interrupts, 5-10 read-only memory, 5-17 timing, 5-3 Controlling units, 3-1, 3-4 display, 3-9 keyboards, 3-11 mainframe computer, 8-23 maintenance consoles, 3-10 microcomputer, 8-17 minicomputer, 8-21 panels, 3-7, 3-8, 3-10 power/temperature panels, 3-7 remote consoles, 3-13 teletypes, 3-12 Controls buffer, 7-21 bus, 5-24 channel, 7-14 circuits, 6-4, 7-13 data entry/display, 8-21 external, 1-10 function/command, 7-9 independent request, 7-18 mainframe computer, 8-23 memory, 7-13, 7-20 microcomputer, 8-17 minicomputer, 8-21 modem, 7-20 operator, 1-10 sequence, 5-5 transmit, 7-21 words, 7-9, 7-14 Converter analog to digital, 4-20, 13-3 Cooling systems, 2-26 Coprocessor, numeric data, 5-23 Core memory, 6-9 Correction/detection, error bit, 6-8 Counter, program, 5-6, 5-9 Counters, 4-15 CPU interface, direct, 7-14 Cycle core, 6-12 mated film, 6-18, 6-19 memory, 6-6, 6-7 read/write, 6-20 Cylinder addressing, disk, 10-4 D Daisy chaining, 7-17 Data asynchronous, 7-28 INDEX-3
p. 384
bus, 5-24 communications equipment, 7-1, 7-28 display, 1-3, 8-17, 8-21, 8-23 entry, 8-17, 8-21, 8-23 external function, 7-1 gathering, 1-2 input acknowledge, 7-33 input request, 7-33 lines, 7-33 message framed, 7-29 process, 1-2 routing circuits, 4-12 sequence of events, input, 7-33 strobe, 7-32 synchronous, 7-28 terminal equipment, 7-1,7-28 transfer, 7-36 types/formats, 4-24 words, 7-8 Data conversion devices, 13-1 Data encoding methods, disk, 10-25 frequency modulation, 10-26 modified frequency modulation (MFM), 10-26 run length limited (RLL), 10-26 Data organization CD-ROM, 11-2 disk, 10-3 tape, 9-8 DC amplifiers, 4-21 DCE/DTE serial I/O cable signals, 7-29 Decision-making functions, 4-11 Demultiplexer, 4-14 Designators, 8-7 Desktop systems, 1-9 Destructive readout, 6-2 Detection/correction, error bit, 6-8 Devices, protection, 3-2,4-29 Diagnostics mainframe computer, 8-24 microcomputer, 8-18, 8-19 minicomputer, 8-21 ROM, 8-18 tape, 9-20 testing, 5-18 Diagrams, functional block, 2-2 Digit drivers, 6-20 Digital ICs, 4-7 convention, 4-8 functional uses, 4-11 groups, 4-9 logic circuits, 4-9, 4-10 logic gates, 4-8,4-9 Digital fire control switchboard (DFCS), 13-26 Digital switchboards, 13-25 manual switchboards, 13-25 remotely controlled switchboards, 13-26 Digital-to-analog conversion, 13-7 converter, CV-25lB/UYK, 13-8 Digital-to-digital (D/D) conversion, 13-13 Digital-to-linear/scalar conversion, 13-8 DIP switches, 8-16 Direct interface, 7-14 memory access, 7-16 memory interface (DMI) bus, 5-26 operand addressing, 8-10 Directories, disk root directory, 10-5 subdirectories, 10-5 Disk magnetic— see magnetic disk INDEX-4 Display, 3-2 control units, 3-9 data, 1-3 drivers, 4-21 operator controls, 3-1 Disseminate data, 1-3 DIX, Ethernet, 7-25 Double-length instructions, 8-13 Double word, 4-25 DRAM, 6-24 Drivers digit, 6-20 display, 4-21 integrated circuits, 4-19 line, 7-21 memory, 4-21 peripheral, 4-21 Dual-channel operating mode, 7-11 Dynamic RAM (DRAM), 6-24 E EF sequence of events, 7-34 EFA, 7-33 EFR, 7-33
p. 385
EI data, 7-2 sequence of events, 7-34 EIA RS-232, 7-24 EIE, 7-33 EIR, 7-33 Electromagnetic interference, 1-14 Electronics, integrated drive, 7-27 Enables, sequence, 5-5 Encoding, 13-3 End-around-test (EAT), 13-39 Enhanced small device interface (ESDI), 7-27 Environmental inventory, 5-18 Equipment data communications, 7-1, 7-28 data terminal, 7-1, 7-28 Error bit detection/correction, 6-8 ESA, 7-11 Escape codes, printer, 12-3 ESDI, 7-28 ESI, 7-11 Ethernet DIX (IEEE 802.3), 7-25 Events external function sequence (normal), 7-34 external interrupt sequence, 7-34 input data sequence, 7-32 output data sequence, 7-34 single-cable sequence, 7-32 two-cable sequence, 7-33 Exchanges asynchronous data, 7-28 synchronous data, 7-28 Executive state, 5-10 instructions, 5-10 Extended operand addressing, 8-11 Extension interface, requestor, 5-25 External connectors, 2-21 controls, 1-10 single-cable equipment, 7-32 two-cable equipment, 7-33 External function data, 7-2 request/acknowledge, 7-33 sequence of events (normal), 7-34 External interrupt data, 7-2 requestionable, 7-33 sequence of events, 7-34 words, 7-9 Externally specified address/index (ESI) operating mode, 7-11 E Fault detection, memory, 6-7 Fetch (read) the instruction, 5-9 Fiber optic cables, 2-25 File allocation table, 10-6 Film mated, 6-17 memory, 6-13 Filter, power supply, 4-26 Filters, 2-12 5.25-inch floppy disk, 10-7 densities and coercivities, 10-10 Fixed disk care and handling, 10-30 Fixed disk interfaces, 10-27 Enhanced Integrated Drive Electronics Interface (EIDE), 10-28 Enhanced Small Device Interface (ESDI), 10-27 Integrated Drive Electronics (IDE) Interface, 10-27 Small Computer Systems Interface (SCSI), 10-28 ST-506/412 Interface, 10-27 Fixed hard disk systems, 10-23 Fixed-point operations, 5-20 Flag, set/clear, 7-14 Flat cables, 2-24 Flip-flops, 4-10 Floating-point operations, 5-20 Floppy disk drives, 10-8 configuration, 10-11 installation, 10-11 Floppy disks, 10-6 care and handling, 10-12 5.25-inch, 10-7 3.5-inch, 10-8 Format instructions, 8-7 interfacing, 7-21 parallel, 7-9 serial, 7-9 Formatting disk, 10-4 disk pack, 10-22 INDEX-5
p. 386
high-level format, 10-29 low-level format, 10-28 Formats, data, 4-24 Frames/cabinets, 2-7 cage/rack, 2-10 chassis/assembly, 2-8 modular, 2-8 motherboard/backplane, 2-11 safety/security features, 2-12 Full-word instructions, 8-12 Function commands control words, 7-8 external acknowledge, 7-33 external data, 7-2 external request, 7-33 external sequence of events, 7-34 Functional operation, 1-7 battle short mode, 1-13 block diagrams, 2-2 decision making, 4-11 layouts, 2-4 online and offline, 1-12 operational capabilities/limitations, 1-13 operational requirements, 1-14 operational uses, 1-7 Functions computer, 1-1 instruction/control, 5-6 memory, 4-15 G Gaskets, 2-12 Gates, digital logic, 4-9 Gateway, 7-2 Gather data, 1-2 General linear circuits, 4-19 Gray code, 13-4 Ground, 7-32 Guards, 3-2 H Half-word instructions, 8-12 Hamming code, 6-8 Handshaking, 7-2 Hexadecimal, 4-3 Hours (time totalizing meter), 3-2 Hub, 7-2 I I/O (See input/output) IC bipolar, 4-7 categories, 4-7 digital, 4-7 families, 4-7 linear, 4-18 metal-oxide semiconductor, 4-7 packaging, 4-5 size, 4-5 ID lines, 7-33 sequence of events, 7-33 IDA, 7-33 IDR, 7-33 IEEE 802.3 (Ethernet DIX), 7-25 802.5,7-24 Immediate operand addressing, 8-11 Impact printers, 12-7 chain and band printers, 12-8 character printers, 12-9 daisy wheel printers, 12-10 dot matrix printers, 12-9 drum printers, 12-7 line printers, 12-7 Implicit (implied) operand addressing, 8-11 Independent request control, 7-18 Index registers, 5-6 Indexed operand addressing, 8-12 Indicators, operator controls, 3-2 Indirect operand addressing, 8-12 Inhibit current regulator, 6-13 Initiate transfer, 7-14 Input cable, 7-33 data lines, 7-33 data request/acknowledge, 7-33 data sequence of events, 7-33 Input/output, 7-1 circuits, 7-11, 7-13 control memory, 7-13 data arrangement, 7-8 functions, 7-12 INDEX-6
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instructions, 7-9 intercomputer, 7-35 interrupt driven, 7-15 IOC/IOA interfacing, 7-4 IOC/IOA module, 7-3 MEM bus or input/output controller (IOC) bus, 5-25 memory reference, 7-13 operations, 7-11, 7-13, 7-14 organization, 7-2 parallel data operations, 7-31 pcb’s, 7-7 polled, 7-15 processor, 7-3 serial data operations, 7-28 terminology, 7-1 wait loop, 7-15 waveshapes, 4-8 Instruction(s), 5-19, 7-9, 8-1 bus, 5-25 character addressable, 8-12 double length, 8-13 execute, 5-9 fetch/read, 5-9 formats, 8-7, 8-8 full-word, 8-12 half-word, 8-12 language interpretation, 8-5 levels, 8-3 multiple-word, 8-13 operand addressing, 5-10, 8-10 operational levels, 5-10 programs/software, 8-2 register, 5-6 size, 8-12 translation, 5-9 types, 8-3 Instruction and control functions, 5-6 Integrated circuits, 4-5 categories, 4-7 digital, 4-7 families, 4-7 line driver/receiver, 4-21 linear, 4-18, 4-20 packaging, 4-5 receiver, 4-20 regulator, 4-20 size integration, 4-5 Integrated drive electronics (IDE), 7-27 Intercomputer channel operating mode, 7-11 I/O operations, 7-35 Interconnection system, 5-25 Interface circuits, memory, 6-4 circuits, systems, 4-21 direct, 7-14 enhanced small device, 7-27 man/machine, 8-1, (See also, man/machine interfaces) requestor extension, 5-25 small system, 7-23 Interfacing, 7-1, 7-14 components, 7-19 formats, 7-21 methods of connections, 7-17 parallel data operations, 7-31 serial data operations, 7-28 standards, 7-18 terminology, 7-1 Interference, electromagnetic, 1-14 Interleave, 6-7 Interleave factor, fixed disk, 10-26 Internal connectors, 2-18 Interrupt, 5-10 classes I-IV, 5-12 codes, 5-13 driven I/O, 7-15 external data, 7-2 external sequence of events, 7-34 external words, 7-9 handling process, 5-13 lockout, 5-12 request, external, 7-33 task state, 5-10 Inventory, environmental, 5-18 IOA, 7-4 IOC, 7-3 J Jumpers, 8-16 K Key switches, 3-2 INDEX-7
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Keyboards, 3-11 Keyset central multiplexer (KCMX), 13-15 L Language instructions, 8-5 Layouts assembly/chassis, 2-4 backplane/motherboard, 2-6 block diagrams, 2-2 card cage/rack, 2-4 Functional, 2-3 modular, 2-4 physical, 2-4,2-6 Levels of instruction, 8-3 Limitations, operational, 1-13 Line conditioners, 4-29 drivers/receivers, 4-20, 4-21, 7-21 Line printers, 12-7 chain and band printers, 12-8 drum printers, 12-7 Linear ICs, 4-18 family types, 4-18 fictional uses, 4-20 gates, 4-19 groups, 4-19 Lines data, 7-32 input data, 7-33 output data, 7-33 Load/write control memory, 7-14 Logic circuits, digital, 4-4, 4-9 gates, digital, 4-9 Logical operations, 5-23 M Main timing, 5-4 Mainframe computers, 1-3, 8-8, 8-23 bootstrap, 8-25 configuration, 8-23 controls, 8-23 data entry/display, 8-23 diagnostics, 8-25 initiate operational programs, 8-25 instruction format, 8-8 interrupt/lockout, 5-12, 5-14 power, apply, 8-23 revise/patch software, 8-26 Magnetic disk data encoding methods, 10-25 drive unit, 10-19 file unit controls and indicators, 10-15 fixed hard drive system, 10-23 floppy disks, 10-7 memory sets, 10-13 Magnetic disk packs, 10-14 data surfaces, 10-14 servo surface, 10-14 Magnetic disk storage, 10-1 data organization, 10-3 disks and disk drives, 10-2 Magnetic tape, 9-1 construction, 9-2 devices, 9-11 handling procedures, 9-2 maintenance, 9-3 recording methods, 9-7 storage, 9-6 transport, 9-15 Magnetic tape controller, 9-12 control unit, 9-13 control panel, 9-14 microprogrammed controller, 9-13 Magnetic tape unit operations, 9-12 offline operations, 9-13 programmed controller, 9-13 read/write, 9-12 rewind, 9-13 search, 9-12 space file, 9-12 Maintenance consoles, 3-10 Man/machine interfaces, 8-1,8-15 functions, 8-16 mainframe computer, 8-23 microcomputer, 8-16 minicomputer, 8-20 operating modes, 8-15 operations, 8-15 Mapped I/O memory, 7-14 Master clock, 5-4 Mated film, 6-17 Math pat, 5-23 Matrices, 6-16 INDEX-8
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Memory address translation, 6-6 architecture, 6-4 cache, 5-15 capacity, 6-1 control, 5-15 core, 6-9 cycle, 6-6 direct interface, 5-26 DRAM, 6-24 drivers, 4-21 fault detection, 6-7 film, 6-13 functions, 4-15 interface circuits, 6-4 load/write control, 7-14 mapped I/O, 7-l 4 modules, 6-2 non-destructive readout, 6-27 nonvolatile, 6-2 operations, 6-l, 6-4 organization, 6-2 pcb’s, 6-3 programmable ROM, 6-30 protection, 6-8 RAM chip, 6-3, 6-20 read-only (ROM), 5-17, 6-26 read/write, 6-11 ROM, 5-17, 6-26 semiconductor, 6-20 SRAM, 6-22 stack, 6-11, 6-18 store control, 7-15 terminology, 6-2 types, 6-8 volatile, 6-2 Memory-type functions, 4-15 Message framed data, 7-28 Metal-oxide-semiconductor ICs, 4-7 Meter, time totalizing, 3-2 Microcomputers, 1-6, 8-10 bootstrap, 8-19 configuration, 8-16 controls, 8-17 data entry/display, 8-17 diagnostics, 8-18, 8-19 initiate operational programs, 8-19 instruction formats, 8-7 interrupt, 5-11 power, 8-17 revise/patch software, 8-20 MIL-STD-188, 7-24 MIL-STD-1397, 4-22, 7-22 Minicomputers, 1-5, 8-20 bootstrap, 8-22 configuration, 8-20 controls, 8-21 data entry and display, 8-21 diagnostics, 8-21 initiate operational programs, 8-22 interrupt/lockout, 5-12 power, apply, 8-20 revise/patch software, 8-23 Modem control, 7-20 Modes dual-channel operating, 7-11 intercomputer channel operating, 7-11 online/offline, 1-12 phase, 8-15 run, 8-15 sequence, 8-15 single channel, 7-11 step, 8-15 stop, 8-15 Modular frames/cabinets, 2-7 layout, 2-4 Modules, memory, 6-2 Monitor clock, 5-5 sync/suppress, 7-14 words, 7-14 Motherboard/backplane, 2-11 layout, 2-6 Multiple-phase clock systems, 4-23 Multiple-word instructions, 8-13 Multiplexing data converters, 13-14 Multivibrators, 4-23 N NDRO memory, 6-27 Nibble, 4-24 NIPS, 1-8 Non-destructive readout memory, 5-17, 6-2, 6-27 INDEX-9
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Nonimpact printers, 12-10 electrothermal printers, 12-13 inkjet printers, 12-13 laser printers, 12-11 Nontactical systems, 1-8 Nonvolatile memory, 6-2 Number systems, 4-2 Numeric data coprocessor, 5-23 O Octal, 4-3 ODA, 7-33 ODR, 7-33 Online/offline operations, 1-12 Operand addressing direct, 8-10 extended, 8-11 immediate, 8-11 implicit, 8-11 indexed, 8-11 indirect, 8-12 instruction, 8-10 relative, 8-12 task state, 5-10 Operand bus, 5-25 Operands, 5-20, 8-9 addressing, 8-10 Operating modes battle short, 1-13 dual-channel, 7-11 externally specified index, 7-11 I/O operations, 7-35 intercomputer channel, 7-11 online/offline, 1-12 single channel, 7-11 Operating systems, 8-4 Operation code, 8-7 levels of instructions, 5-10 types, 5-20 Operational capabilities/limitations, 1-13 programs, 8-3 requirements of computer systems, 1-14 uses of computers, 1-7 Operations, 1-1, 1-7 control memory, 7-15 fixed point, 5-20 floating point, 5-20 functions, 1-1, 1-7 intercomputer I/O, 7-35 logical, 5-23 memory, 6-4 parallel, 7-13 Operator controls, 1-15,3-1 displays, 3-2 indicators, 3-2 potentiometer, 3-1 protective devices, 3-2 switches, 3-2 time totalizing meter, 3-2 Operator panels, 3-7 Organization, memory, 6-2 Orientation, print, 12-4 Oscillators, 4-23 Output cable, 7-33 Output data request/acknowledge, 7-33 sequence of events, 7-34 P Pat, math, 5-23 Packets, 6-14 Panels control/maintenance, 3-8 operator, 3-7 power/temperature, 3-7 Paper-feed assembles, 12-6 friction feed, 12-6 tractor feed, 12-6 Parallel . data interfacing, 7-31 format, 7-9 operations, 7-13 Parity check, 6-7 Parity checks, tape, 9-9 Pcb, 2-19,6-3 Peripheral drivers, 4-21 Personal systems, 1-9 Phase mode, 8-15 Physical layouts, 2-4,2-8 Pin description, RS-232, 7-30 Pointers, buffer address, 7-14 Polled I/O, 7-15 INDEX-10
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Position switches, 3-3 Potentiometer, 3-1 Power backup, 4-29 filter, 4-26 mainframe computer, 4-27 microcomputer, 4-28 minicomputer, 4-30 requirements, 2-22 standby, 4-30 uninterruptible, 4-30 Power supplies, 4-25 components, 4-26 controlling devices, 4-26 input, 4-25 mainframe/minicomputer, 4-27 microcomputer, 4-28 output, 4-27 protection, 4-27 protection devices, 4-29 Power/temperature panels, 3-7 Printed circuit boards, 2-13 Printer interfaces, 12-5 Centronics parallel interface, 12-5 RS-232 serial interface, 12-5 Printers, 12-1 character printers, 12-9 characteristics, 12-5 control codes, 12-3 impact printers, 12-7 nonimpact printers, 12-10 Printing character sets, 12-2 control codes, 12-3 line characteristics, 12-4 orientation, 12-4 Procedures, boot, 5-18 mainframe computer, 8-25 microcomputer, 8-19 minicomputer, 8-22 Process data, 1-2 interrupt handling, 5-13 Processor, I/O, 7-4 Program counter, 5-6, 5-9 Programmable interval timers, 5-5 read-only memory, 6-30 Programs, 8-2 applications, 8-3 instructions, 8-3 mainframe computer, 8-25 microcomputer, 8-19 minicomputer, 8-22 operational, 8-3 utility., 8-3 PROM, 6-30 Protection devices, 3-2, 4-29 memory, 6-10 Protocol, 7-2 Pushbutton switches, 3-3 Q Quantization, 13-3 Queue/stack, interrupt, 5-13 R Random access memory (RAM), 6-3 chip, 6-20 dynamic, 6-24 static, 6-22 Read cycle circuits, 6-20 core, 6-12 mated film, 6-18 memory, 6-7 Read/write control, 7-20 cycle circuits, 6-20 memories, 6-9 Read-only memory (ROM), 5-17,6-26 Readout, destructive, 6-2 Real-time clock, 5-5 Receive buffer/receive control, 7-21 Receivers line, 7-21 transmitters, universal, 7-19 Rectifier, 4-26 Reduced write current, 10-28 Registers, 4-11, 5-6, 5-22 accumulator, 5-6 index, 5-6 instruction, 5-6 INDEX-11
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shift, 4-18 status indicating, 5-7 storage, 4-17 Regulators, 4-26 inhibit current, 6-13 integrated circuits, 4-19 switching, 4-20 voltage, 4-20 REI, 5-25 Relative operand addressing, 8-14 Remote consoles, 3-13 operator control units, 3-13 Requestor extension interface (REI), 5-25 Requests independent control, 7-18 input data, 7-33 output data, 7-33 Requirements functional operations, 1-14 operational, 1-14 power, 2-21 Ribbon cables, 2-24 Ring, token, 7-24 ROM, 5-17, 6-26 ROM based diagnostics, 8-18 RS-232, 7-24 pin description, 7-30 RS-422, 7-24 RS-449, 7-23 RTC, 5-5 Run mode, 8-15 S Safety/security features of frames/cabinets, 2-12 Sampling, 13-3 Search for sync/set suppress/set monitor, 7-14 Sectors, disk, 10-3 Security, ADP, 1-14 Select signal, 7-32 Selectors, 4-14 Semiconductor memory, 6-20 DRAM, 6-24 SRAM, 6-22 Sense amplifiers, 4-21,6-13,6-20 Sequence enables and control, 5-5 mode, 8-15 Sequence of events external function, 7-34 external interrupt, 7-34 input data, 7-33 output data, 7-33 single cable, 7-32 two cable, 7-33 Sequencing circuits, 7-13 Sequential digital logic circuits, 4-10 Serial, 7-14 data operations, 7-28 format, 7-9 Set/clear flag, 7-14 Shift registers, 4-18 Ship, switchboard, and computer switching control panel (CSCP) wiring, 13-34 Signals acknowledge, 7-32 audible alarms, 3-2 busy, 7-32 command, 4-13 DCE/DTE, 7-29 enable, 4-13 select, 7-32 Single-cables, 7-32 sequence of events, 7-32 Single-channel operating mode, 7-11 Single-phase clock systems, 4-23 Size instructions, 8-12 Small computer system interface, 7-23 SNAP systems, 1-9 Software, 1-10, 8-4 Software revisions mainframe computer, 8-26 microcomputer, 8-20 minicomputer, 8-23 SPS, 4-30 SRAM, 6-22 ST-506/412, 7-27 Stack memory, 6-11, 6-16 queue, interrupt, 5-13 Standards, interfacing, 7-18 Standby power supply (SPS), 4-30 State, executive, 5-10 State, task INDEX-12
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instruction operand addressing, 5-10 interrupts, 5-10 Static RAM (SRAM), 6-22 Status-indicating registers, 5-7 Step mode, 8-15 Stop mode, 8-15 Storage battery protected, 8-17 registers, 4-17 Store control memory, 7-14 data, 1-2 Strobe, data, 7-32 Subassemblies, 2-13 Support systems, tactical, 1-8 Suppress sync monitor, 7-14 word, 7-14 Surge protectors, 4-29 Switchboards, 13-1 analog, 13-35 digital, 13-25 Switches, 3-2 DIP, 8-16 key, 3-3 position, 3-3 pushbutton, 3-3 toggle, 3-4 two position, 3-4 Switching regulators, 4-20 Sync/suppress monitor, 7-14 Synchro signals, 13-6 Synchro-to-digital (S/D) conversion, 13-7 octant conversion, 13-7 sector conversion, 13-7 single-speed/dual-speed synchro conversions, 13-7 Synchros, 13-5 control synchro systems, 13-5 multispeed synchro systems, 13-5 torque systems, 13-5 Synchronous data exchanges, 7-28 Systems ASW, 1-8 basic input/output, 5-18 cooling, 2-26 interconnection, 5-25 interface circuits, 4-21 nontactical, 1-8 number, 4-2 operating, 8-4 operational requirements, 1-14 personal/desktop, 1-9 single-phase clock, 4-23 SNAP, 1-9 tactical, 1-7 tactical support, 1-8 T Tactical support systems, 1-7 Tactical systems, 1-7 Tape, magnetic— see magnetic tape Task state, 5-10 instruction operand addressing, 5-10 instructions, 5-10 interrupts, 5-10 Teletypes, 3-12 Testing, diagnostic, 5-18 3.5-inch floppy disk construction, 10-8 densities and coercivities, 10-10 Time access, 6-2 multiplexed bus, 5-26 totalizing meter, 3-2 Timers, 4-21 programmable interval, 5-5 Timing, 5-2 ALU, 5-19 circuits, 4-22,4-23 components, 4-23 control section, 5-3 I/O, 7-12 main, 5-3 memory, 6-5 Toggle switches, 3-4 Token ring (IEEE 802.5), 7-24 Tracks, disk, 10-3 Transformer, 4-26 Translate instructions, 5-9 Translators, 4-14 Transmit buffer/transmit control, 7-21 Transmitters, universal receiver, 7-19 Twisted component/multiconductor cables, 2-25 Two-cable sequence of events, 7-33 Two-position switches, 3-4 INDEX-13
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U Uninterruptible power supply (UPS), 4-30 Universal receiver transmitters, 7-19 Update the program counter, 5-9 UPS, 4-30 Uses, operational, 1-7 Utility programs, 8-3 V Viruses, 10-29 Volatile memories, 6-2 Voltage regulators, 4-20 W Waveshapes, 4-8 Word, 4-24 control, 7-8 data, 7-8 double, 4-25 external interrupt, 7-9 function (command) control, 7-9 monitor, 7-14 suppress, 7-14 Write cycle core, 6-13 mated film, 6-19 memory, 6-7 Write precompensation, 10-28 INDEX-14
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Assignment Questions Information: The text pages that you are to study are provided at the beginning of the assignment questions.
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ASSIGNMENT 1 Textbook Assignment: “Fundamentals and Operations of Computers,” chapter 1, p[ages 1-1 through 1-17; and “Computer Configurations and Hardware,” chapter 2, pages 2-1 through 2-12. 1-1. 1-2. 1-3. 1-4. 1-5. All computers have which of the following components in common? 1. Modem, memory, and floppy drives 2. Math coprocessor, microchips, and central processing unit 3. Central processing unit, memory, and input/output section 4. Analog processing unit, input/ output section, and microchips The amount of computing power a computer has is determined by which of the following factors? 1. Physical size 2. Size of drives 3. Number of drives 4. Technology used All computers must be capable of which of the following functions? 1. Processing and storing data 2. Retaining data on compact disks 3. Interfacing with mainframe computers 4. Interfacing with desktop publishing equipment Computers can gather data by which of the following methods? 1. Manually only 2. Automatically only 3. Both manually and automatically 4. Local-area networks A computer automatically gathers data by which of the following means? 1. 2. 3. 4. From another system, subsystem, or equipment From specific software By a local terminal user By a remote terminal user 1-6. Which of the following tasks is the main purpose of a computer? 1. 2. 3. 4. Storing data Gathering data Processing data Disseminating data 1-7. Computers can externally store data on which of the following types of media? 1. Magnetic disks only 2. Magnetic tape only 3. Paper tape only 4. Magnetic disks, magnetic tape, and paper tape 1-8. Computers can disseminate data to which of the following types of equipment? 1. A display subsystem only 2. A magnetic tape or disk unit only 3. A printer only 4. A display subsystem, magnetic tape or disk unit, and a printer 1-9. Computer systems display which of the following general types of data/information? 1. 2. 3. 4. Hardware performance information only Data related to the system’s mission only Status information related to the system’s operation only Data related to the system’s mission and status information related to the system’s operation, and hardware performance information 1-10. In addition to display units, a computer relies on what other equipment to display processed data? 1. Floppy disks 2. Processors 3. Printers 4. Modems 1
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1-11. What are the three general types of computers? 1. Mini, macro, and laptop 2. Personal, mini, and macro 3. Mainframe, mini, and micro 4. Technological, mainframe, and desktop 1-12. The mainframe computers you will maintain in the 1-13. 1-14. 1-15. 1-16. Navy are categorized by which of the following terms? 1. Wordprocessing 2. General purpose 3. Specialized 4. Graphical The Navy adapts a specific program to fit its needs and does not deviate once this program is installed into the computer. 1. True 2. False What type of computer is housed in a large, rugged frame or cabinet? 1. Minicomputer 2. Microcomputer 3. Macrocomputer 4. Mainframe computer What types of computers use operator console and maintenance console panel/display control units to perform maintenance? 1. Mainframe computers 2. Microcomputers and minicomputers 3. Minicomputers and microcomputers 4. Microcomputers and local-area network computers Although a computer maybe used for many types of operations, which of the following computers are considered the heart of the tactical and tactical support data systems? 1. 2. 3. 4. Minicomputers Microcomputers Mainframe computers Minicomputers or microcomputers, depending on the system 2 1-17. The SNAP I and II systems use as their host computers which of the following equipment? 1. Minicomputers 2. Microcomputers 3. Mainframe computers 4. Local-area network computers 1-18. Some of the newer microcomputers maybe even more powerful than older, larger mainframe computers. 1. True 2. False 1-19. What type of computer has the CPU contained on a single integrated chip? 1. Microcomputer 2. Macrocomputer 3. Minicomputer 4. Mainframe computer 1-20. Which of the following elements is generally considered an optional equipment for microcomputers? 1. Display monitor 2. Keyboard 3. Printer 4. Modem 1-21. Training for which of the following types of computers is NOT NEC producing? 1. Minicomputer 2. Microcomputer 3. Mainframe computer 4. Microcomputer 1-22. What is the heart of every data system? 1. Software 2. Operator 3. Computer 4. Peripherals
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1-23. How do computer systems exchange data? 1. Through local-area networks 2. Through transfer of software 3. Through a knowledgeable and competent operator 4. Through a series of interrupts, requests, and acknowledges 1-24. Which of the following types of data do computers 1-25. 1-26. 1-27. 1-28. exchange? 1. Data words only 2. Status signals only 3. Control signals only 4. Data words, status signals, and control signals How is interfacing between computers and peripherals accomplished? 1. Cables and connectors 2. Electronic emissions 3. Output devices 4. External disk drives What are the three operational uses of computers by the Navy? 1. Graphical, database, and tactical 2. Nontactical, tactical, and tactical support 3. Tactical support, graphical, and database 4. Word processing, tactical support, and nontactical The number of computers used in a tactical data system depends on which of the following factors? 1. Size of ship 2. Class of ship 3. Mission of ship 4. Length of ship deployment Tactical support platforms include a variety of systems and normally use which of the following types of computers in their operations? 1. Minicomputers only 2. Microcomputers only 3. Mainframe computers only 4. Microcomputers and mainframe computers 1-29. ASW systems use what means as the central point of operation? 1. A single computer only 2. A data processing subsystem 3. A video processing subsystem 4. Multiple computers 1-30. In a JMCIS system, informational data is provided 1-31. 1-32. 1-33. 1-34. to designated - flagships for what purpose? 1. Logistical inventories 2. Flight orders of shipboard planes 3. Mobilization and documentation of personnel 4. Battle management of tactical situations In the JMCIS system, how do desktop computers in the data processing and video processing subsystems communicate? 1. By coaxial cable 2. By fiber-optic LANs 3. By disk exchange 4. By modems The naval intelligence processing system uses which of the following types of specially modified computers in a LAN configuration as its operational computers? 1. Unisys 44 2. Unisys 101 3. Zenith 150 4. DTC/TAC-n personal computers The naval intelligence processing system uses which of the following operating systems? 1. OS-2 and UNIX 2. OS-2 and MS-DOS 3. MS-DOS® and UNIX™ 4. DR-DOS and INIX Nontactical systems normally use which of the following types of computers? 1. Minicomputers and microcomputers 2. Mainframes and minicomputers 3. Microcomputers and mainframes 4. Desktop and mainframes 3
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1-35. What are BASIC, FORTRAN, COBOL, PASCAL, and C? 1. Computer programs 2. Computer languages 3. Computer processing units 4. Computer operating systems 1-36. 1-37. 1-38. On a LAN, personal computers can share which of the following resources? 1. Software only 2. Data files only 3. Data files and peripherals only 4. Data files, peripherals, and software The type and number of computers that makeup a system have a direct bearing on which of the following elements? 1. Hardware and software 2. Configuration and setup 3. Operating system and location 4. Number of operators and types of software Hardware setup includes what three things? 1. Physical design, ease of maintenance, and operator controls 2. Operator controls, external controls, and physical design 3. External controls, ease of maintenance, and physical design 4. Maintenance availability, operator controls, and external controls 1-39. In software setup, what must you specify to the software? 1. The resources to use 2. The number of operators 3. The climate of the location 4. The purpose of the software 1-40. 1-41. 1-42. 1-43. Your involvement with software is directly dependent on which of the following factors? 1. Type of mission 2. Type of computer 3. Type of peripherals 4. Type of organization Who designs the software for mainframes used in tactical and tactical support applications? 1. Outside support activities 2. Commercial software designers 3. Shipboard computer programmers 4. MOTUs When configuring and setting up software for a microcomputer, you must keep in mind which of the following factors? 1. You must know how to correct operational program discrepancies 2. You must use only software that was designed by an outside support activity 3. The computer system must be connected to the nearest mainframe computer 4. The operating system must be customized to the hardware of the computer system When using applications software with your microcomputer, you must ensure that the software is compatible with which of the following elements? 1. Coprocessor 2. Operating system 3. Memory unit 4. Mainframe computers 1-44. When the computer is on line, which of the following factors cause it to function correctly? 1. Software 2. Peripherals 3. RAM capacity 4. Modems 4
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1-45. 1-46. 1-47. 1-48. 1-49. In the offline mode of operation, a computer is limited to performing which of the following operations? 1. Tactical 2. Nontactical 3. Maintenance 4. Tactical support The battle short mode of operation is used when the computer must run continuously under which of the following conditions? 1. When software is being loaded 2. When maintenance is being performed 3. When an overtemperature condition exists 4. When an under-temperature condition exists An overtemperature condition can be a result of which of the following conditions? 1. Too many software programs loaded into ROM 2. A failed assembly situation only 3. An inadequate cooling condition only 4. Either a failed assembly situation or an inadequate cooling situation The operational capabilities and limitations of a computer system can be controlled by all except which of the following devices? 1. Switchboards 2. Telephone hookups 3. Software commands 4. Control panels To reconfigure a computer system to a reduced capability, which of the following devices can be used? 1. Peripherals only 2. Switchboards only 3. Control panels only 4. Switchboards, control panels, and I/O devices 1-50. A computer’s effective operation and security may be seriously jeopardized by which of the following factors? 1. Electromagnetic interference and lack of ADP security 2. Electromagnetic interference and physical location of equipment 3. Operator knowledge of mission and lack of ADP security 4. Both 2 and 3 above 1-51. The Navy ensures that only authorized users gain 1-52. 1-53. 1-54. access to computer nontactical systems (SNAP) by which of the following means? 1. Locking the computer when it is not in authorized use 2. Authorizing the use of only certain software 3. Storing the software in a secure place 4. Using passwords to identify authorized users To learn more about computer security, which of the following instructions should you study? 1. OPNAVINST 5239.1 only 2. OPNAVINST 5510.1 only 3. Both OPNAVINSTS 5239.1 and 5510.1 4. MIL-STD-1355 What type of electromagnetic interference (EMI) causes the majority of EMI problems in digital data equipment? 1. Narrowband 2. Broadband 3. Inherent 4. Natural Aboard ship, which of the following conditions does NOT have a significant effect in EMI? 1. 2. 3. 4. Grounding of equipment Interconnecting cables Location of equipment Software in use 5
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1-55. 1-56. 1-57. 1-58. 1-59. 1-60. At a shore-based installation, control of EMI involves the same factors as for a shipboard computer system, but with the addition of which of the following other considerations? 1. Terminal operators 2. Site location only 3. Soil quality only 4. Both site location and soil quality To assist in avoiding or reducing the effects of EMI, you may find guidelines for the proper construction of bonding straps and grounding cables in which of the following publications? 1. OPNAVINST 5510.1 2. NAVSEA OP 3556 3. NAVSEA S9507 4. MIL-STD 1310 The functional units of a computer are always consistent regardless of the computer’s type. 1. True 2. False To obtain the most reliable and effective instructions for maintaining a computer, you should refer to which of the following current references? 1. 2. 3. 4. OPNAVINST 5239.1 SECNAVINST 5230.7 The computer’s technical manual Local instructions A computer’s functional block diagram should provide you with all of the following information except which one? 1. Operational principles 2. Software compatibility 3. Signal types and flows 4. Major functional areas What are the three major functional areas of a computer? 1. CPU, I/O, and modem 2. Memory, I/O, and CPU 3. Hard disk, modem, and memory 4. Monitor, memory, and hard disk 1-61. 1-62. 1-63. 1-64. 1-65. 1-66. 6 The physical layout diagram gives you a picture of all of the following locations or types of computer elements except which one? 1. Module 2. Console 3. Assembly 4. Signal flow What are the four types of physical layouts for computers? 1. Backplane, assembly, cage, and LAN 2. Cage, motherboard, modular, and desktop 3. Assembly, rack, backplane, and modular 4. Chassis, motherboard, mainframe, and desktop For modular data systems that use multiple configurations, both minimum and full physical layout configurations will be shown on a physical layout. 1. True 2. False In a chassis or assembly type computer, which of the following methods is/are usually used to mount the chassis or assembly? 1. Door mounted only 2. Slide mounted only 3. Both door and slide mounted 4. Backplane mounted A cage or rack type computer’s major functional areas are always contained on one pcb. 1. True 2. False Computers that use motherboards usually have a total of how many backplanes or motherboards to contain assemblies and pcb’s? 1. One 2. Two 3. Three 4. Four
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1-67. What layout gives you information on subassemblies or printed circuit boards in each assembly, chassis, or module? 1. 2. 3. 4. Overall physical layout Overall functional layout Individual physical layout Individual functional layout 1-68. 1-69. 1-70. You do not have a need for an individual physical layout diagram in which of the following situations? 1. When you have the overall physical layout diagram 2. When you have the overall functional layout diagram 3. When you have the repair memorized 4. When you never repair the unit The configuration of a particular computer is normally dictated by which of the following criteria? 1. 2. 3. 4. Type of computer and data system platform Available power supply and programming needs Data system platform and projected use of computer Type of computer and anticipated software installation A computer’s frame usually contains which of the 1. 2. following hardware? 1. The computer only 2. The power supply only 3. The computer and the power supply only 4. The computer, power supply, and cooling hardware 1-71. When compared to other types of computer cabinets, what is the largest single advantage of modular frames in addition to mobility? 1-72. 1-73. Pcb’s are arranged in which of the following ways inside a chassis? 1. In close proximity and in square blocks 2. In close proximity and in rows 3. Spread out and in rows 4. Spread out and on opposite sides of the cabinet Motherboard-designed computers have which of the following features as their primary design feature? 1. Portability 2. Ruggedness 3. Shipboard use 4. Tactical use 1-74. It is easier to maintain computers that have motherboards for which of the follow reasons? 1. The cabinet need not be removed 2. The power need not be secured 3. The computer’s small size and ease of component accessibility 4. All of the above 1-75. What two features used in or on a cabinet provide limited protection for a computer? 3. 4. Gaskets and filters Surge protectors and shock reducers Insulating material and grounding wires External power source and RF interference adapters 1. 2. 3. 4. Ruggedness Adaptability Ease of installation Access to control panels NOTE: MS-DOS is a registered trademark of Microsoft Corporation. UNIX is a trademark of AT&T. 7
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ASSIGNMENT 2 Textbook Assignment: “Computer Configurations and Hardware,” chapter 2, pages 2-13 to 2-27; and “Computer Operator Controls and Controlling Units,” pages 3-1 through 3-15. 2-1. 2-2. 2-3. 2-4. 2-5. How do manufacturers key subassemblies to avoid incorrect installation? 1 2 3 4 They tag the subassembly with the correct location They write the location on the part with indelible ink They make the designation very clear in the technical manual They cut a slot in the side of the pcb or put plastic sheeting on one or more connector pins All subassemblies are repairable at the work station. 1. True 2. False The majority of a computer’s functional areas consists of which of the following components? 1. Motherboards 2. Power drivers 3. Random access memories 4. Printed circuit boards What factor determines the number of printed circuit boards required for a particular computer? 1. Type of computer 2. Portability of computer 3. Accessibility of one computer to another computer 4. Danger of electronic emissions near the work station The arrangement of pcb’s in a computer is dictated by which of the following factors? 1. Type of computer 2. Purpose of the computer 3. Location of the computer 4. Software programs to be used 2-6. 2-7. 2-8. 2-9. 8 Keying pcb’s is done for which of the following reasons? 1. To ensure that the pcb is inserted correctly only 2. To ensure that a different card type is not inserted into an incorrect slot only 3. To ensure that the pcb is inserted correctly and to ensure that a different card type is not inserted into an incorrect slot 4. To facilitate ease of location in an emergency situation You should know the color codes of pcb’s. You will find these color codes explained in which of the following publications? 1. NEETS, Module 3 2. NEETS, Module 4 3. NEETS, Module 19 4. NEETS, Module 21 LEDs are used for which of the following maintenance functions on pcb’s? 1. To test voltage levels 2. To test waveforms 3. To tell when equipment is operating abnormally 4. All of the above Which of the following publications provides a listing for standard external interfaces? 1. MIL-STD-2000 2. MIL-STD-2036 3. NEETS, Module 4 4. NEETS, Module 24
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2-10. Which of the following documents provide(s) maintenance information on connectors and cables? 1. Computer technical manuals 2. EIMB, Installation Standards, NA VSEA 0967-LP-000-0110 3. Both 1 and 2 above 4. MIL-STD-2036 2-11. Connector receptacles are also known as what? 1. Printed circuit boards 2. Subassemblies 3. Modules 4. Jacks 2-12. Mating of a connection only includes electrical pins and contacts or pcb card-edge? 1. True 2. False 2-13. A rectangular connector’s electrical contacts or pins may have which of the following characteristics? 1. Be male or female, flat or oval 2. Be male or female, round or flat 3. Be male or female, round or oval 4. Be oval, round, or rectangular A. Single-piece pcb or card edge B. Two-piece plug and receptable pcb C. Rectangular multipin D. Circular multipin E. Coaxial F. Component Figure 2A.—Connector architecture. IN ANSWERING QUESTIONS 2-14 THROUGH 2-19, SELECT FROM FIGURE 2A THE TYPE OF CONNECTOR ARCHITECTURE DESCRIBED IN THE QUESTION. 2-14. Which item can contain more than 100 pins and contacts? 1. A 2. B 3. C 4. E 2-15. MTIDC or IDC are included in all except which of the following connectors? 1. A 2. B 3. C 4. F 2-16. Telephone jack connectors can be used to connect a conductor to which connector? 1. A 2. C 3. D 4. F 2-17. Contacts or pins on plugs or receptacles are male or female except on which of the following connectors? 1. B 2. C 3. D 4. F 2-18. Provisions for shielding against shock and vibration can be on all except which of the following connectors? 1. A 2. C 3. D 4. E 2-19. Hardware is used to secure which of the following connections and provide stability against shock and vibration? 1. C 2. D 3. E 4. F 9
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2-20. 2-21. Internal connectors are used inside the computer for which of the following reasons? 1. To connect the computer to a display system 2. To provide power to the computer only 3. To interconnect major individual units inside the computer only 4. To interconnect major individual units inside the computer and provide power to the computer What precaution should you use when making connections for pcb’s, modules, or subassemblies? 1. 2. 3. Secure the power to the computer and ensure the receptacle and plug match Ensure that the receptacle or plug has guide pins Force the connection Both 2 and 3 above4. 2-22. Which of the following documents can be used to find the signal names used by a computer? 1. The wire listings only 2. The computer’s prints only 3. The description of a pcb only 4. The computer’s wire listings, prints, and/or a description of each pcb 2-23. Internal conductors can only take mass data and route it for distribution throughout the computer. 1. True 2. False 2-24. To make effective use of limited space, which of the following items are used to neatly organize conductor bundles internally? 1. Lacings 2. Spot ties 3. Wiring harnesses 4. Self-cliching straps 2-25. To secure the wires contained in a wire harness, which of the following items may be used? 1. Lacings only 2. Spot tying only 3. Self-clinching straps only 4. Lacings, spot tying, and self-clinching straps 2-26. If a conductor is partially replaced or completely replaced, a different grade (AWG) and type of conductor can be used. 1. True 2. False 2-27. In addition to securing power to the computer,— what other precaution, if any, should you exercise 2-28. 2-29. when you are disconnecting and reconnecting power and data connections? 1. Follow the proper tag-out procedures 2. Document your actions in the computer room pass down log 3. Backup the data to a floppy or hard drive 4. None; no precautions are needed The power requirements for all computers are identical regardless of where the computers are used. 1. True 2. False To help mate connector receptacles and plugs properly, which of the following methods maybe used? 1. Keying only 2. Physical shape only 3. Keying and physical shape A. Flat B. Ribbon C. Twisted component or multiconductor D. Coaxial E. Fiber optic Figure 2B.—Cable architecture. IN ANSWERING QUESTIONS 2-30 THROUGH 2-34, SELECT FROM FIGURE 2B THE TYPE OF CABLE ARCHITECTURE THAT BEST MATCHES THE DESCRIPTION IN EACH QUESTION. 10
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2-30. Conductors are separated by the dielectric core. 1. A 2. B 3. C 4. D 2-31. Can be terminated with card-edge connectors or IDCs. 1. B 2. C 3. D 4. E 2-32. Can have up to 120 conductors. 1. A 2. B 3. C 4. D 2-33. Capable of transmitting a 20-Mhz signal with minimum loss and no distortion. 1. A 2. B 3. C 4. D 2-34. Used for serial transfer of data only. 1. D only 2. E only 3. D and E 4. A, B, and C 2-35. What is the most critical piece of equipment in any data system? 1. Memory 2. Computer 3. Connector 4. Disk drive 2-36. In cooling systems, what four methods of cooling are used? 1. Convection, forced air, air-to-air, and air-to-liquid 2. Forced air, air-to-air, microwaved, and convection 3. Air-to-liquid, air-to-air, microwaved, and forced air 4. Air-to-air, forced air, external fan-blown, and convection 2-37. What type of operator control is used to alter the speed of an internal computer clock or vary the intensity of indicators? 1. Thumbwheel switch 2. Potentiometer 3. Pushbutton 4. Mouse 2-38. To provide status information to the computer operator, which of the following devices may be used? 1. Dot matrix display only 2. Light-emitting diodes only 3. Dot matrix display and light-emitting diodes 4. Mouse devices 2-39. What is the simplest way to show the status of an operation or the selection of an item? 1. Send a message to a printer 2. Send a message to disk 3. Turn on a light 4. Sound an alarm 2-40. All of the following are types of indicators except which one? 1. Backlit 2. Opaque 3. Clear 4. Color 2-41. Protective devices can serve as controls. 1. True 2. False 11
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2-42. To protect from accidental activation of selected keys and switches, what device is used with selected keys and switches? 1. Horn 2. Guard 3. Circuit breaker 4. Light-emitting diode 2-43. Switches have which of the following functions? 1. To activate a function 2. To turn a unit on/off 3. To set a parameter 4. Each of the above 2-44. A key switch you depress to activate a function 2-45. 2-46. and depress again to deactivate the function is called a/an 1. momentary-action key switch 2. alternate-action key switch 3. three-position key switch 4. on/off key switch A key that repeats the function continuously while being held down is which of the following types of keys? 1. Momentary-action key 2. Alternate-action key 3. Toggle key 4. On/off key Switches that have several positions the operator can select by turning a knob are which of the following types of switches? 1. Rotary switches 2. Pushbutton switches 3. Alternate-action toggle switches 4. Momentary-action toggle switches 2-47. All of the following are characteristics of thumbwheel switches except which one? 1. They have alphanumeric characters built in 2. Each position is locked until another position is selected 3. The position values are usually marked on the controlling unit cover 4. The positions are selected by dialing the switch 2-48. Pushbutton switches may not have indicators. 1. True 2. False 2-49. On toggle switches, which of the following can be 2-50. 2-51. 2-52. a use of the neutral position? 1. To interact with software 2. To set a parameter 3. To disable a locked up/down position 4. All of the above Alternate-action toggle switches may have which of the following positions? 1. Permanent up and return to neutral only 2. Permanent up and down only 3. Either permanent up and return to neutral or permanent up and down, depending on design 4. On and off Momentary-action/contact, two-position toggle switches are normally used for which of the following purposes? 1. To turn the unit on 2. To initiate an operation 3. To provide status information 4. To turn the unit off On a three-position toggle switch, the center position may be used for which of the following purposes? 1. To set a parameter only 2. To disable the locked up/down position only 3. Either to set a parameter or to disable the locked up/down position, depending on the function 4. To provide status information 12
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2-53. 2-54. 2-55. You should expect to find all of the following types of information about controlling units in the technical manuals and owner’s manuals of your system except which one? 1. 2. 3. 4. General description of the unit Tables and figures to describe each control and indicator Circuit diagrams with information for maintenance Manufacturing specifications and design requirements In addition to operational programs, what other type of programs will you be using to perform preventive maintenance? 1. Diagnostic programs 2. Applications programs 3. Word processing programs 4. Database management programs Information about each control and indicator will include all except which of the following information? 1. Name 2. Type 3. Date installed 4. Function and use 2-56. In addition to providing power indicators, which of the following other important functions do power/temperature panels provide? 1. 2. 3. 4. Notify you of an overtemperature condition Enable you to modify the temperature setting for efficient operation Both 2 and 3 above Shut down the system automatically when an overtemperature condition is reached 2-57. From the operator panel you can perform all of the following functions except which one? 1. 2. 3. 4. Initiate computer operations Monitor computer operations Put the computer in battle short condition Power up/down individual designated modules 2-58. Built-in test (BIT) controls and indicators are included on which of the following panels? 1. Operator panel 2. Power/temperature panel 3. Control and maintenance panel 4. Each of the above 2-59. During operation and maintenance, all of the following are computer monitoring capabilities from a control and maintenance panel (CMP) except which one? 1. Software availability 2. Hardware availability 3. Switch settings 4. Jump stops 2-60. The ac plasma part of a display control unit has which of the following functions? 1. Provides you operational information 2. Provides you corrective maintenance information 3. Interfaces with the CPU/IOC and memory 4. Both 2 and 3 above 2-61. A built-in microprocessor with five levels of controls and indications for loading and initiating operations, monitoring operations, status indications, operator interfacing, and self-testing is part of what type of controlling unit? 1. Maintenance console unit 2. Computer control panel 3. Display control unit 4. Operator panel 2-62. To perform diagnostics on a computer, what type of controlling unit enables you to use a data terminal and diagnostics stored on a magnetic tape? 1. 2. 3. 4. Operator panel Maintenance console Display control unit Computer control panel 13
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2-63. From a computer control panel, you can perform which of the following types of monitoring? 1. Operational program status only 2. Display registers only 3. Switch settings only 4. Switch settings, display registers, and computer operations 2-64. What controlling unit enables you to operate the computer set under expanded and varied conditions, at various operating speeds, and in various operating modes? 1. Operator panel 2. Maintenance console 3. Power/temperature panel 4. Computer control unit 2-65. When you manually interface with the CPU and IOC for software enhancement, what is the name of the function you are performing? 1. Diagnostic programming 2. Operator programming 3. Inspect and change 4. Casualty control 2-66. A keyboard will be your primary device for controlling what type of computer, if any? 1. Mainframe 2. Minicomputer 3. Microcomputer 4. None; keyboards are not used to control computers 2-67. On a microcomputer, what is the primary method used to provide information to you? 1. 2. 3. 4. Printer Monitor Light-emitting diodes Indicator lights on the keyboard 2-68. The meanings of function keys and control keys can be assigned in which of the following ways? 1. By the computer hardware manufacturer only 2. By the computer program only 3. By the operating system only 4. By both the computer program and the operating system 2-69. In addition to the keyboard, what other device may 2-70. 2-71. 2-72. you use as a controlling device with the monitor to control the operations of a microcomputer? 1. Mouse 2. Key switch 3. Rotary switch 4. Toggle switch Of the following devices, which one can provide both input to a computer and output from a computer? 1. Mouse 2. Printer 3. Teletype 4. Keyboard A teletype is composed of which of the following components? 1. Printer only 2. Keyboard only 3. Printer and keyboard only 4. Printer, keyboard, and monitor From remote consoles and remote operator control units, you may be able to perform all except which of the following functions? 1. 2. 3. 4. Power the computer set up/down Initiate computer operations Monitor computer status Perform self-testing 14
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ASSIGNMENT 3 Textbook assignment: “Computer Components and Circuits,” chapter 4, pages, 4-1 through 4-23. 3-1. 3-2. 3-3. 3-4. 3-5. A computer has a total of how many states in its binary system? 1. One only 2. Two only 3. Three only 4. Four The digital functions and operations of a computer are based upon what mathematical concept? 1. Calculus 2. Trigonometry 3. Logic algebra 4. Plane geometry You have been assigned to maintain a set of computers. What must you understand about the computers to successfully accomplish your assignment? 1. What comprises the computer’s components 2. How the components make up the computer’s fictional areas 3. How to determine if a particular component is malfunctioning 4. All of the above On input data, a computer performs which of the following types of general functions? 1. Calculus only 2. Geometric only 3. Trigonometric and geometric only 4. Arithmetic and logical What basis is used to determine the logic circuits to be used in a particular computer? 1. The computer’s requirements 3. The computer’s location 4. The software to be used 3-6. Which of the following publications lists standard microcircuits? 1. NEETS, Module 7 2. NEETS, Module 14 3. ANSI/IEEE 91-1984 4. MIL-STD-1562 3-7. Which of the following publications discusses Boolean algebra? 1. NEETS, Module 9 2. NEETS, Module 13 3. NEETS, Module 19 4. MIL-M-38510 3-8. To study wave-generation, you should refer to which of the following publications? 1. NEETS, Module 9 2. NEETS, Module 19 3. ANSI/IEEE 91-1984 4. ANSI/IEEE 991-198 3-9. Standard graphic symbols for logic functions are found in which of the following publications? 1. NEETS, Module 7 2. NEETS, Module 14 3. ANSI/IEEE 91-1984 4. MIL-M-38510 3-10. The octal and hexadecimal number systems are the most popular derivatives used today by digital computers. From what number system are they derived? 1. Roman 2. Arabic 3. Decimal 4. Binary 2. The skills of the operator 15
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IN ANSWERING QUESTIONS 3-11 AND 3-12, REFER TO FIGURE 4-1 ON PAGE 4-3 IN THE TRAMAN. 3-11. The octal number 14 is what in (a) decimal, (b) binary, and (c) hexadecimal? 1. (a) 12 (b) 01110 (c) 14 2. (a) 12 (b) 01100 (c) C 3. (a) 14 (b) 01100 (c) 14 4. (a) 14 (b) 01110 (c) E 3-12. The decimal number 16 is what in (a) binary, (b) octal, and (c) hexadecimal? 1. (a) 1000 (b) 18 (c) F 2. (a) 1000 (b) 20 (c) 10 3. (a) 10000 (b) 16 (c) 16 4. (a) 10000 (b) 20 (c) 10 3-13. In Boolean algebra, what are the two logic levels? 1. 1 and 0 2. 1 and 2 3. 2 and 0 4. 2 and 3 3-14. Which of the following combinations represents the three basic logic gates used in building the combinational and sequential digital logic circuits? 1. OR, BUT, ALSO 2. AND, OR, NOT 3. NOT, NEITHER, NOR 4. AND, BUT, OR 3-15. Modern computers rely on what type of circuits? 1. Balanced 2. Monophase 3. Integrated 4. Multipoint 3-16. Integrated circuits provide what three major advantages? 1. 2. 3. 4. High reliability, low cost, and accessibility Low cost, small size, and high reliability Portability, accessibility, and reliability Small size, low cost, and portability 3-17. For which of the following reasons are integrated circuits packaged in various sizes? 1. Number of leads 2. Color coding 3. Size of chip 4. Key coding 3-18. What scale of integration has 10 to 100 gates? 1. Small scale 2. Medium scale 3. Large scale 4. Very large scale 3-19. What factor determines the integration size of an integrated circuit package? 1. The number of chips 2. The types of leads 3. The number of gates 4. The types of keying 3-20. Integrated circuits that combine the technology of bipolar and metal-oxide semiconductors are referred to as what type of circuit? 1. Unipolar 2. Bipolar 3. BIMOS 4. MOS 3-21. Most of a computer’s integrated circuits are digital. 1. True 2. False 3-22. To process and store information in a computer’s memory, what category of circuit is used? 1. MOS only 2. Bipolar only 3. Digital 4. Linear 16
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3-23. Bipolar integrated circuits include all of the following components except which one? 1. ECL 2. ALS 3. TTL 4. TTLC 3-24. Which of the following components is NOT a part of a MOS integrated circuit? 1. DTL 2. TTLC 3. CMOS 4. HCMOS 3-25. In the determination of whether a computer’s logic level is negative or positive, what is the relationship of the two voltages? 1. 2. 3. 4. They are relative to each other They are independent of each other They intermesh with each other One is dominant; the other subordinate IN ANSWERING QUESTIONS 3-26 THROUGH 3-28, SELECT FROM THE FOLLOWING LIST THE TERM DESCRIBED IN EACH QUESTION. 1. Pulse width 2. Pulse-repetition time 3. Pulse-duration modulation 4. Pulse-repetition frequency 3-26. The time period from a repeating waveshape’s starting point until the next starting point. 3-27. The time interval between specified reference points on the leading and trailing edges of a waveform. 3-28. The number of times per second that a signal’s complete cycle occurs. GIVEN: A DIGITAL WAVESHAPE HAS A PRT OF 25 µsec AND A NEGATIVE PW OF 15 µsec. Figure 3A.—Example statement. IN ANSWERING QUESTIONS 3-29 AND 3-30, REFER TO FIGURE 3A. 3-29. What is the value of the positive PW? 1. 6 µsec 2. 8 µsec 3. 10 µsec 4. 12 µsec 3-30. What is the value of the PRF? 1. 37 kHz 2. 40 kHz 3. 43.5 kHz 4. 47.5 kHz 3-31. What is the basic building block for combinational digital circuits? 1. Diode 2. Capacitor 3. Flip-flop 4. Logic gate 3-32. What is the basic building block for sequential circuits? 1. Resistor 2. Conductor 3. Flip-flop 4. Logic gate 3-33. Logic gates perform decision-making functions throughout the computer. 1. True 2. False 3-34. Which of the following is another term for flip-flops? 1. Unistable multivibrators only 2. Bistable multivibrators only 3. Tristable multivibrators only 4. Multivibrators 17
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3-35. What are the four types of flip-flops? 1. J-K, set, open, closed 2. Toggle, data, reset-set, J-K 3. Reset-set, data, continuous, open 4. Open, continuous, closed, toggle 3-36. Decision-making functions are composed primarily of which of the following components? 1. Combinational gates 2. Bistable multivibrators 3. Sequential digital circuits 4. Independent linear circuits IN ANSWERING QUESTIONS 3-37 THROUGH 3-44, SELECT FROM FIGURE 3-B THE DATA ROUTING CIRCUIT DESCRIBED IN THE QUESTION, A. Adder and subtracter circuits B. Command signal circuits C. Comparator circuits D. Demultiplexer circuits E. Selector circuits F. Translator circuits Figure 3B.—Data routing circuits. 3-37. Which circuits provide the enable to route data between circuits? 1. A 2. B 3. E 4. F 3-38. Which circuits are used with shift registers and holding registers to perform hyperbolic and trigonometric functions? 1. A 2. B 3. C 4. D 3-39. 3-40. 3-41. 3-42. 3-43. 3-44. Which circuits can change machine octal codes into function codes? 1. C 2. D 3. E 4. F Which circuits expand the number of input data paths to a register? 1. A 2. C 3. E 4. F Which circuits are capable of performing square root when used with shift and holding registers? 1. A 2. C 3. D 4. F Which circuits can select an address? 1. B 2. D 3. E 4. F Which circuits can be used to compare incoming binary numbers after mathematical operations have been performed? 1. B 2. C 3. D 4. F Which circuits route data from one input to any one of several outputs? 1. A 2. D 3. E 4. F 18
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3-45. 3-46. 3-47. 3-48. 3-49. 3-50. Memory-type functions are accomplished by what type of circuit? 1. Linear 2. Bipolar 3. Sequential 4. Combinational Counters can only be used in parallel operations. 1. True 2. False Counters are used for which of the following functions? 1. 2. 3. 4. For counting operations and quantities only For counting periods of time only For addressing information in storage only For counting operations, quantities, and periods of time; and for addressing information in storage What items constitute a register? 1. Numbers of circuits 2. Groups of flip-flops 3. Numbers of logic gates 4. All of the above The length of a register is determined by what factor? 1. 2. 3. 4. The function it performs The type of logic the computer uses The number of bits (flip-flops) grouped together The number system the computer uses: octal or hexadecimal There are two types of registers most commonly used in computers. Which of the following terms refer to these registers? 1. 2. 3. 4. Memory and backup Storage and shift Backup and memory Storage and backup 3-51. 3-52. 3-53. 3-54. 3-55. 3-56. What type of storage register, if any, does NOT alter the contents? 1. General 2. Specialized 3. Subject-specific 4. None; all storage registers can alter their contents In what transfer method is the receiving register cleared of its contents before a transfer occurs? 1. Single-line parallel 2. Double-1ine parallel 3. Complement 4. Displaced Of the following transfer methods used with registers, which one is the fastest? 1. Complement method 2. Displaced method 3. Direct method 4. Forced method What register can handle information in serial and parallel form? 1. Complement 2. Storage 3. Backup 4. Shift In linear circuits, the graph of output versus input approximates which of the following types of lines? 1. Wavy 2. Arced 3. Zigzag 4. Straight DMOS and bipolar technology is known by what acronym? 1. BIFET 2. BIDFET 3. BIDMOS 4. MOSFET 19
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3-57. The basic gate for a linear integrated circuit is a/an 1. operational amplifier 2. diffuser 3. catalyst 4. conductor 3-58. An inverting input of an op amp provides what degree of phase shift at the output? 1. 150 2. 180 3.210 4.315 3-59. All of the following types of circuits are part of a computer’s linear integrated circuits except which one? 1. Digital circuits 2. Driver integrated circuits 3. Regulator integrated circuits 4. Analog signal conversion circuits 3-60. Which of the following circuits detect overtemperature conditions? 1. Timers 2. Analog converters 3. Digital converters 4. Comparators, voltage regulators, and switching regulators 3-61. Which of the following circuits can be used to produce an astable multivibrator? 1. 2. 3. 4. Timers Comparators Switching regulators Analog to digital converters 3-62. All of the following are classifications of systems interface circuits of a computer except which one? 1. 2. 3. 4. Line drivers, receivers Sense amplifiers, memory drivers Peripheral and display drivers Timers and analog-to-digital converters 3-63. Information is written into magnetic memories by which of the following drivers? 1. Line 2. Memory 3. Display 4. Peripheral 3-64. Display drivers use what type of input and output application? 1. Single 2. Dual 3. Trifold 4. Multiple 3-65. In the transmission of digital signals over short distances, which of the following types of line drivers and receivers are used? 1. 2. 3. 4. Peripheral Differential only Single-ended only Either differential or single-ended, depending on the design 3-66. For high-speed, long distance communications, which of the following types of drivers is/are used? 1. Single-ended only 2. Differential only 3. Both single-ended and differential 4. Basic wire cables 3-67. Timing circuits are used in a computer for which of the following reasons? 1. To keep track of calendar and clock times 2. To automatically make backup copies of data 3. To properly enable and disable circuits at specific times 4. To automatically disengage the computer if it becomes too hot 20
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3-68. Aprogram has been installed and the computer is operating. The enabling and disabling circuits will stop operating under each of the following conditions except which one? 1. Fault condition occurs 2. Programmed stop is reached 3. Program completion is reached 4. Instructions are executing 3-69. The master clock in a computer is the key to the computer’s timing circuits. Master clocks usually operate at a frequency or pulse-repetition rate determined by which of the following factors? 1. The maximum speed of the operator 2. The minimum speed of the operator 3. The minimum rate the computer can handle data 4. The maximum rate the computer can handle data 3-70. In computer timing circuits, what is the most important reason for using oscillators? 1. Their output characteristics 2. Their frequency stability 3. Their phase processing 4. Their speed IN ANSWERING QUESTIONS 3-71 THROUGH 3-74, SELECT FROM THE FOLLOWING LIST THE TYPE OF MULTIVIBRATOR DESCRIBED BY THE PHRASE IN EACH QUESTION. 1. Monostable 2. Bistable 3. Astable 3-71. The multivibrator that is also referred to as a one-shot multivibrator. 3-72. The multivibrator that counts clock pulses. 3-73. The multivibrator also known as a free-running multivibrator. 3-74. The multivibrator used to enable logic gates. 3-75. A single-phase clock system has what types of multivibrators? 1. 2. 3. 4. Monostable and bistable Bistable and astable Monostable and astable Astable and multistable 21
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ASSIGNMENT 4 Textbook Assignment: “Computer Components and Circuits,” chapter 4, pages 4-24 through 4-31; and “Central Processing Units and Buses,” chapter 5, pages 5-1 through 5-10. 4-1. Which of the following are the types of data elements that can be processed by a computer? 1. Bits and bytes only 2. Bytes and single words only 3. Bits, bytes, and single words only 4. Nibbles, words, double words, bytes, and bits 4-2. What data element is normally the same size as the computer’s registers? 1. Bit 2. Nibble 3. Word 4. Double word 4-3. What is the purpose of a computer’s power supply? 1. To supply dc voltage 2. To convert ac voltage from a source to useable dc voltage(s) 3. To convert dc voltage(s) from a source to useable ac voltage(s) 4. To supply ac voltage 4-4. Characteristics of a power supply include all of the following except which one? 1. 2. 3. 4. Provide precision voltages Protect the computer from serious damage Supply regulated ac voltages Sense irregular inputs and outputs 4-5. What are the major sections of a computer’s power supply? 1. Amplifier, rectifier, filter, and regulator 2. Transformer, generator, filter, and regulator 3. Transformer, rectifier, filter, and regulator 4. Transformer, rectifier, filter, and transmitter 4-6. 4-7. 4-8. 4-9. The computer can only handle one specified input voltage and frequency. 1. True 2. False Aboard ship, distribution of computer input power is via which of the following means? 1. 2. 3. 4. Outlets only Load centers only Power panels only Outlets, load centers, and power panels Mainframe and minicomputers aboard ship and ashore are preset to only receive the specific input line voltage needed. 1. True 2. False Aboard ship, what document provides the specific voltage and frequency values as well as the location of your computer’s power? 1. MIL-STD-1399 2. MIL-HDBK-411 3. Ship’s electronics doctrine 4. MIL-HDBK-263 4-10. For referencing input power ashore, which of the following documents should you use? 1. 2. 3. 4. MIL-STD-1399, Section 300A MIL-STD-480 MIL-HDBK-411 Each of the above 22
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4-11. For referencing input power aboard ship, which of the following documents should you use? 1. MIL-STD-1399, Section 300A 2. MIL-STD-480 3. MIL-HDBK-411 4. Each of the above 4-12. Where does the input line voltage go before it is received by the transformer section of the computer’s power supply? 1. To the rectifier section 2. To the ON/OFF switch 3. To the blower fan 4. To the filter section IN ANSWERING QUESTIONS 4-13 THROUGH 4-20, SELECT THE POWER SUPPLY SECTION THAT MATCHES THE CHARACTERISTIC DESCRIBED IN EACH QUESTION. 1. Regulator 2. Rectifier 3. Filter 4. Transformer 4-13. Isolates the power supply from the input line voltage. 4-14. Provides regulated power to additional circuits for further filtering and/or conversion. 4-15. Converts an ac input signal to pulsating dc voltage or ripple. 4-16. Steps up the input line voltage. 4-17. Maintains the output of the power supply at a constant level. 4-18. Provides the necessary power for the bus system terminating resistors. 4-19. Removes pulsating dc ripple and produces a useable dc voltage. 4-20. Provides dc power to the backplane wire harness, and to remote, operator, and maintenance consoles. 4-21. The voltage levels and logic convention for mainframe and minicomputers are identical. 1. True 2. False 4-22. The output of the computer’s power supply can be distributed by which of the following sections? 1. Rectifier only 2. Regulator only 3. Both rectifier and regulator 4. Filter 4-23. The power supply must protect the computer from which of the following elements? 1. Incoming power 2. Distributed power 3. Internal cabinet and/or module temperature 4. All of the above 4-24. A power supply will shut off while the computer is running under what condition(s), if any? 1. A low overtemperature condition 2. A high overtemperature condition only 3. A high overtemperature condition and an overcurrent condition 4. None IN ANSWERING QUESTIONS 4-25 THROUGH 4-31, SELECT FROM THE FOLLOWING LIST THE SIGNAL GENERATED UNDER THE SPECIFIC CONDITION DESCRIBED IN EACH QUESTION. 1. POWER INTERRUPT (PI) 2. MASTER CLEAR (MC), AUTOMATIC 3. STOP 4-25. Used for computer initialization after power has been applied. 4-26. Source power falls below specifications and returns to normal. 4-27. Generates a class I interrupt. 4-28. Logic power goes out of tolerance. 23
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4-29. Source power is lost or the computer cabinet is shut off. 4-30. Generated a specific period after a PI occurs. 4-31. Prevents loss of memory data if logic power is lost faster than normal the turn-off sequence can occur. 4-32. To indicate that power requirements have been met, what digital active signals are generated by a microcomputer’s power supply? 1. LEDs only 2. Ac only 3. Dc only 4. Ac and dc 4-33. To provide protection to the computer, which of the following devices are placed in line with the power source? 1. Compensators only 2. Line conditioners only 3. Surge protectors only 4. Compensators, line conditioners, and surge protectors 4-34. Which of the following protective devices provide protection against brownouts? 1. ABTs 2. Surge protectors 3. Line conditioners only 4. Compensators and line conditioners 4-35. Line conditioners can provide all of the following protection except which one? 1. Suppress over-voltage 2. Filter input power 3. Bridge brownouts 4. Provide ac input voltage 4-36. Surge protectors retain their effectiveness with successive surges. 1. True 2. False 4-37. What device allows the computer to execute software during power absences up to 100 ms during transfer of primary power source? 1 G UPS 2. Compensator 3. ABT 4. SPS 4-38. SPSs and UPSs are constructed in much the same way except for which feature? 1. Switching circuitry 2. Power loss is detected 3. Ac line current is sensed 4. Power is transferred from one primary source to another 4-39. What are the three major functional areas of a computer? 1. CPU, I/O, buses 2. CPU, memory, power supply 3. CPU, memory, I/O 4. CPU, I/O, power supply 4-40. Information concerning the logic implementation and interpretation of a specific digital computer would be found in which of the following references? 1. Technical manual 2. Technical manual and MRC 3. MRC only 4. NEETS, Module 13 4-41. Which of the following documents should contain the functional schematics of a digital computer? 1. Technical manual only 2. Owner’s manual only 3. Either the technical manual or the owner’s manual 4. NEETS, Module 13 24
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4-42. 4-43. 4-44. 4-45. 4-46. 4-47. Which of the following references contains the test documentation and procedures, test equipment, and tools required to perform corrective maintenance on a specific computer? 1. Technical manual/owner’s manual 2. MRC 3. Ship’s electronics equipment doctrine 4. CSOSS documentation Which of the following functional areas provide(s) the means for the CPU, memory, and I/O to communicate with each other? 1. System cables 2. System buses 3. System modem 4. Wire bundles What two interacting sections compose the CPU? 1. Control and memory 2. ALU and memory 3. Control and ALU 4. ALU and I/O All of the following are characteristics of the CPU’s control section except which one? 1. Whereto store information and who to talk with 2. How to compute logical solutions 3. When to start and stop 4. What to do The control section may provide the computer with the ability to function under which of the following conditions? 1. Manual control only 2. Program control only 3. Manual and program control 4. Interface control The control section includes all the following logically designed areas except which one? 1. Timing, and instruction and control 2. Fixed- and floating-point operations 3. Memories-control, cache, and read-only 4. Addressing and interrupts 4-48. What logically designed area in the control section regulates the operation of the computer? 1. Instruction and control 2. Addressing 3. Interrupts 4. Timing 4-49. What type of timing is used for the execution of instructions stored sequentially in memory? 1. Arithmetic timing 2. Synchronous operations 3. Master clock events 4. Asynchronous operations IN ANSWERING QUESTIONS 4-50 THROUGH 4-55, SELECT FROM THE FOLLOWING LIST THE LOGICALLY DESIGNED AREA THAT PERFORMS THE OPERATION DESCRIBED IN EACH QUESTION. 4-50. 4-51. 4-52. 4-53. 4-54. 4-55. 1. Master clock 2. Main timing chain 3. Main timing signals 4. Timing sequences Used to trigger a single-shot to enable and disable circuits in the sequence necessary to execute computer operations. Flip-flops are arranged in a ring counter to count master clock phases. Used to generate a command enable for sending data from one register to another. Taps on a delay line oscillator can be used to provide additional phases. Used to issue a series of commands to perform a particular instruction or operation. Used to start arithmetic timing and generate command enables used for arithmetic operations. 25
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4-56. To keep track of time intervals, which of the following types of timing circuitry can be used? 1. Monitor clock only 2. Programmable internal timer only 3. Monitor clock and programmable internal timer 4. Real-time clock (RTC) A. Accumulator B. Index register C. Instruction register D. Program counter E. Status indicating register Figure 4A.—Memory type circuits. 4-57. To keep track of real time, which of the following timing circuits can be used? 1. 2. 3. 4. RTC only Monitor clock only RTC and monitor clock RTC and programmable interval timer 4-58. Which of the following timing circuits are 4-59. 4-60. 4-61. software/machine instruction controlled? 1. RTC only 2. Monitor clock only 3. Programmable interval timer only 4. RTC, monitor clock, and programmable interval timer To channel data inside the computer, what type of circuits are primarily used with registers for instruction and control operations? 1. Analog conversion 2. Data routing circuits 3. Code converter circuits 4. Interface circuits A general-purpose register is also known by what name? 1. Instruction 2. Accumulator 3. Program counter 4. Status indicating General-purpose registers are generally the same size as the computer’s memory word. 1. True 2. False IN ANSWERING QUESTIONS 4-62 THROUGH 4-68, SELECT FROM FIGURE 4A THE MEMORY TYPE CIRCUIT THAT APPLIES TO THE FUNCTION DESCRIBED IN EACH QUESTION. 4-62. Used for address modification and counting. 1. A 2. B 3. C 4. D 4-63. Holds the address of the next instruction to be executed. 1. B 2. C 3. D 4. E 4-64. Can be used to indicate the status of operations in the computer. 1. B 2. C 3. D 4. E 4-65. Outputs of this register are translated into commands for CPU execution. 1. B 2. C 3. D 4. E 26
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4-66. 4-67. 4-68. 4-69. 4-70. Used for temporary storage of data or memory addresses. 1. A 2. B 3. C 4. D These registers are used with branching condition instructions to change the sequence of instruction execution. 1. A 2. B 3. D 4. E Enables a single instruction to be used to specify a large number of operands indirectly. 1. A 2. B 3. C 4. D In the general process of executing a machine instruction, what are the major steps? 1. 2. 3. 4. Write the instruction to memory, update the program counter, translate the instruction, and execute the instruction Encode the instruction, execute the instruction, update the program counter, and read the instruction from memory Increment the instruction register, update the program counter, decode the instruction, and execute the instruction Read the instruction from memory, update the program counter, translate the instruction, and execute the instruction Which of the following methods can be used to change the sequence of program execution? 1. Stop and jump switches only 2. Program instructions only 3. Stop and jump switches and program instructions 4-71 Command enables are generated by which of the following parts of the general process of machine instruction execution? 1. Fetch the instruction 2. Update the program counter 3. Translate the instruction 4. Execute the instruction 4-72. The computer executes instructions at two levels or states. Data bits in what register are used to select the instruction operating levels? 1. The index register 2. The program counter 3. The instruction register 4. The status indicating register 4-73. Interrupt processing instructions can be included in which of the following types of programs? 1. Executive function programs 2. Application programs to solve a fire control solution 3. Application programs to compute a sonobuoy pattern 4. Both 2 and 3 above 4-74. Which of the following instructions can only be performed in the executive state? 1. Add instructions 2. Subtract instructions 3. Privileged instructions that are part of interrupts 4. Read instructions 4-75. What is the purpose of instruction operand addressing? 1. To specify the location of the operand 2. To tell when to perform the instruction 3. To tell whereto obtain the instruction 4. To tell how to obtain the memory address of the instruction 27
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ASSIGNMENT 5 Textbook Assignment: “Central Processing Units and Buses,” chapter 5, pages 5-13 through 5-23. 5-1 5-2 5-3 5-4 The interrupt that occurs with the actual event that caused the interrupt is (a) what type and (b) what will be the status of the condition of the process or program after the interrupt is processed? 1. (a) Asynchronous (b) Different conditions will exist 2. (a) Asynchronous (b) The exact same conditions will exist 3. (a) Synchronous (b) Different conditions will exist 4. (a) Synchronous (b) The exact same conditions will exist What type of interrupt occurs (a) when there is an error in a peripheral device and (b) when I/O operations are terminated? 1. (a) External (b) internal 2. (a) External (b) external 3. (a) Internal (b) internal 4. (a) Internal (b) external In a microcomputer, an interrupt from an internal hard disk can be masked out by the computer. 1. True 2. False In microcomputers, which of the following methods can be used to direct the processor to the address of the interrupt of a maskable interrupt? 1. An interrupt code only 2. A ROM lookup table only 3. A ROM/PROM lookup table only 4. An interrupt code and a ROM/PROM lookup table IN ANSWERING QUESTIONS 5-5 THROUGH 5-11, SELECT FROM THE FOLLOWING LIST THE INTERRUPT CLASS THAT MATCHES THE CONDITION OR PRIORITY DESCRIBED IN EACH QUESTION. 5-5. 5-6. 5-7. 5-8. 5-9. 5-10. 5-11. 5-12. 5-13. 1. Class I 2. Class II 3. Class III 4. Class IV An RTC overflow has occurred. An intercomputer timeout has occurred. The highest priority interrupt that can occur in the computer. A power out of tolerance has occurred. The computer will execute a power failure processing routine. An input chain interrupt has occurred, An illegal op code has been executed in the CPU. Lower level interrupts can be disarmed and/or armed by software. 1. True 2. False Which of the following interrupts can usually be locked out by software? 1. Power fault 2. External interrupt 3. CPU instruction fault 4. IOC instruction fault interrupt 28
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5-14. In newer computers, which of the following methods can be used to retain multiple interrupt codes of the same class? 1. Interrupt stack only 2. Interrupt queue only 3. Both interrupt stack and queue 4. Index registers 5-15. For an interrupt signal in a particular class to be indicated to the CPU, what minimum number of interrupts must be present? 1. One 2. Two 3. Three 4. Four A. Terminate current program execution B. Lock out all interrupts C. Store program and register data D. Retrieve interrupt processor data E. Enter executive state and enable desired interrupts F. Execute interrupt processor program G. Return to original process Figure 5-A.--Interrupt handling process steps. IN ANSWERING QUESTIONS 5-16 THROUGH 5-23, REFER TO FIGURE 5-A ABOVE AND FIGURE 5-9 ON PAGE 5-13 OF THE TRAMAN. SELECT THE MOST APPROPRIATE INTERRUPT HANDLING PROCESS STEP FOR THE PROCESS DESCRIBED IN EACH QUESTION. 5-16. New interrupts are locked out to protect the integrity of the process that ensures returning to the same conditions after processing the interrupt. 5-17. 5-18. 5-19. 5-20. 5-21. The step in which the interrupt process will be initiated. 1. A 2. B 3. C 4. D In newer computers, a separate register set for each task and executive state is used, and these registers are disabled and the contents protected until the appropriate state is entered. 1. A 2. B 3. C 4. D The computer enters the required executive state and enables the interrupts that in turn interrupt the interrupt processor after the status registers are loaded. 1. B 2. C 3. D 4. E The new executive state registers are loaded with the interrupt processor program data after the register data is saved. 1. B 2. C 3. D 4. E The current process’s register data is stored with at least the contents of the program counter and status register(s). 1. A 2. B 3. C 4. D 1. A 2. B 3. C 4. D 29
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5-22. The first instruction of an interrupt routine is executed after the interrupt code words are sampled. 1. D 2. E 3. F 4. G 5-23. The program counter and status register(s) is/are reloaded with the saved data. The next instruction, prior to the interrupt (instruction 4), is called up by the program counter. 1. D 2. E 3. F 4. G 5-24. Less time is required to access control memory than to access main memory. 1. True 2. False 5-25. Where is cache memory usually located in a computer? 1. In main memory 2. In the I/O section 3. Between the CPU’s control and ALU sections 4. Between main memory and the CPU 5-26. For rapid data transfers, what two types of semiconductor devices are usually used by cache memories? 1. Bipolar DRAMs and MOS SRAMs 2. Bipolar SRAMs and bipolar DRAMs 3. MOS SRAMs and MOS DRAMs 4. MOS DRAMs and bipolar SRAMs 5-27. 5-28. 5-29. 5-30. 5-31 In terms of access and capacity of a cache memory, a cache memory is usually on the order of one magnitude (a) than main (slower; faster) memory and its capacity is two orders of magnitude (b) than main memory. (less; more) 1. (a) Slower (b) less 2. (a) Slower (b) more 3. (a) Faster (b) less 4. (a) Faster (b) more Which of the following methods can be used by a cache memory to indicate which entries of main memory have been copied into it? 1. A hit 2. A tag store 3. An identifier 4. Both 2 and 3 above Which of the following properties pertain(s) to cache memory? 1. 2. 3. 4. A high-speed memory A logical network and an old entries replacement method Timing and control All of the above To indicate that data from the requested address is present, which, if any, of the following terms is used? 1. Hit 2. Miss 3. Tag 4. None of the above What area of cache memory writes only to the directories? 1. Updates 2. Invalidates 3. Searches 4. Tags 30
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5-32. What cache process is performed by a requestor other than the CPU within? 1. Main 2. Mapping 3. Eavesdrop 4. Searching IN ANSWERING QUESTIONS 5-33 THROUGH 5-36, SELECT FROM THE FOLLOWING LIST THE CACHE MAPPING TECHNIQUE DESCRIBED IN EACH QUESTION. 5-33. 5-34. 5-35. 5-36. 5-37. 5-38. 5-39. 1. Direct mapping 2. Fully associative mapping 3. Set associative mapping Is the most flexible cache mapping technique with regards to where data can reside. Combines the best cache mapping techniques. Main memory locations can only be copied into one location in cache. If cache is full, a replacement algorithm is used to decide which block gets replaced by new data. What cache read method can be used to present the cache and main memory with the reference simultaneously? 1. Look-aside, serial read 2. Look-aside, parallel read 3. Look-through, serial read 4. Look-through, parallel read In a look-through read, the cache is checked last. 1. True 2. False Optimum cache replacement would be psychic and have perfect knowledge of the future. What cache replacement policy, if any, comes closest to the optimum cache replacement? 1. LRU 2. FIFO 3. Random 4. None, all are very different 5-40. Instruction routines in a ROM are considered to have which of the following characteristics? 1. Permanent and volatile 2. Permanent and nonvolatile 3. Temporary and volatile 4. Temporary and nonvolatile 5-41. Permanent software loaded as firmware is the process known by which of the following terms? 1. Boot 2. Bootstrap 3. Boot up 4. Each of the above 5-42. An NDRO in a militarized mainframe or minicomputer is usually located in which of the following places? 1. In the CPU module 2. In the chassis that contains CPU’s pcbs 3. Either 1 or 2 above, depending on whether it is a mini or mainframe computer 4. On one or more IC chips of a CPU/memory pcb 5-43. Diagnostics programs on an NDRO include all of the following items except which one? 1. Test the timer 2. Load failure analysis 3. Memory and interface tests 4. Computer interconnection system IN ANSWERING QUESTIONS 5-44 THROUGH 5-47, SELECT FROM THE FOLLOWING LIST THE AREA OF A BIOS DESCRIBED IN EACH QUESTION 5-44. 5-45. 5-46. 1. Diagnostic testing 2. Environmental inventory 3. Boot procedure Testing the video, interrupt controller, CPU register and flags, or the keyboard. A prompt is displayed to let you know the microcomputer is ready to use. The ROM chip program searches for the operating system files. 31
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5-47. The number of printers and serial ports is determined. 5-48. The ALU obtains the data required to perform arithmetic and logical calculations from which of the following places? 1. Timing circuits 2. Operands only 3. Designated CPU registers only 4. Operands and designated CPU registers 5-49. To perform computations, which of the following methods is/are used in addition and subtraction operations? 1. Radix minus one only 2. Radix minus two only 3. Conversion only 4. Radix minus one, radix minus two, and conversion 5-50. The destination of the results of ALU operations may include which of the following places? 1. Timing circuits 2. Registers only 3. Operands only 4. Registers and operands 5-51. Computers can be designed to use which of the following word-length operands to carry out arithmetic operations? 1. Whole-word, half-word, and quarter-word operands only 2. Single-length word operands only 3. Double-length word operands only 4. Whole-word, half-word, quarter-word, single-length word, and double-length word operands 5-52. Double-length memory word operands will be used for mathematical operations when the size of the result would be (a) than the (less; greater) length of either of the registers used to provide inputs to the ALU or the operands being input to the ALU are (b) than a single word. (larger; smaller) 1. (a) Less (b) larger 2. (a) Less (b) smaller 3. (a) Greater (b) larger 4. (a) Greater (b) smaller IN ANSWERING QUESTIONS 5-53 THROUGH 5-56, SELECT FROM THE FOLLOWING LIST THE ITEM USED BY THE ALU IN ARITHMETIC OR LOGICAL CALCULATIONS DESCRIBED IN EACH QUESTION. 5-53. 5-54. 5-55. 5-56. 5-57. 5-58. 1. Flags 2. Selectors 3. Counters Used to keep track of shifts. A carry or borrow condition is indicated. Used to transfer data between various registers in the ALU. Used to indicate the status of the last logical calculation. What method is used to represent a integer number? 1. R’s minus 1 2. R’s minus 2 3. Fixed-point 4. Floating-point For whole numbers, what is the maximum absolute decimal value that can be contained in a 6-bit register? 1. 31 2. 32 3. 63 4. 64 32
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5-59. 5-60. 5-61. 5-62. 5-63. A zero in what (a) position indicates a positive number and a one in what (b) position indicates a negative number? 1. (a) msb (b) lsb 2. (a) msb (b) msb 3. (a) lsb (b) lsb 4. (a) lsb (b) msb In a 6-bit register, the largest positive value that can be contained is what decimal number? 1. 31 2. 32 3. 63 4. 64 When floating-point operations are performed, the radix point must be aligned properly. The alignment of the radix point takes place at which of the following times? 1. During arithmetic operations only 2. After arithmetic operations only 3. Either during or after arithmetic operations, depending on the type of operation 4. Before arithmetic operations In floating-point operations, what is the fractional portion of the number called? 1. Characteristic 2. Mantissa 3. Radix 4. Sign In a number, the radix point is usually placed in what location? 1. Between the sign bit and the msb of the characteristic 2. Between the sign bit and the lsb of the characteristic 3. Between the sign bit and the lsb of the mantissa 4. Between the sign bit and the msb of the mantissa IN ANSWERING QUESTION 5-64, REFER TO FIGURE 5-15, FRAME A, ON PAGE 5-21 IN THE TRAMAN. 5-64. 5-65. 5-66. 5-67. 5-68. For which of the following reasons is zero extended through the most significant 16 bits of the word that contains the characteristic? 1. The integer is a positive number 2. The integer is a negative number 3. The mantissa is a positive number 4. The mantissa is a negative number Where the most accuracy is required during floating-point operations, (a) what format is used with two 32-bit words and (b) what is the relationship of the characteristic to the mantissa? 1. (a) Single-precision (b) Characteristic is smaller 2. (a) Single-precision (b) Characteristic is larger 3. (a) Double-precision (b) Characteristic is smaller 4. (a) Double-precision (b) Characteristic is larger Under which of the following conditions are the mantissa’s results rounded up? 1. When the mantissa is less than one-half of one only 2. When the mantissa is greater than one-half of one only 3. When the mantissa is equal to or less than one-half of one 4. When the mantissa is equal to or greater than one-half of one What type of floating-point interrupt condition, if any, exists when there is a positive excess? 1. Overflow 2. Underflow 3. Divisor 4. None, there is no floating point interrupt What method does the ALU use to perform arithmetic and logical instructions? 1. Logical quotients of the logic gates 2. Logical products of the logic gates 3. Logical sums of the logic gates 4. Logical differences of the logic gates 33
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5-69. 5-70. The ALU portion of a computer can be designed to perform a wide variety of arithmetic operations. Which of the following are the only arithmetic capabilities that computers can have to perform all arithmetic operations? 1. 2. 3. 4. Addition and multiplication Addition and subtraction Subtraction and multiplication Subtraction and division A computer has no dedicated square root instruction. Which of the following instructions could be used to perform the square root function? 1. Addition and subtraction only 2. Addition and comparison only 3. Subtraction and comparison only 4. Addition, subtraction, and comparison 34 5-71. Logical ALU functions include all of the following except which one? 1. AND and OR 2. NOT 3. Compare 4. BAM 5-72. A numeric data coprocessor operates in (a) what manner with the CPU and independent of the CPU using (b) which of the following buses? 1. (a) Parallel (b) Different buses from the CPU 2. (a) Parallel (b) The same buses as the CPU 3. (a) Serial (b) Different buses from the CPU 4. (a) Serial (b) The same buses as the CPU
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ASSIGNMENT 6 Textbook Assignment: “Central Processing Units and Buses,” chapter 5, pages 5-24 through 5-29; and “Computer Memories,” chapter 6, pages 6-1 through 6-20. 6-1. 6-2. 6-3. 6-4. The buses in a computer are controlled by (a) what functional area and (b) what type of communication path is used? 1. (a) CPU (b) serial 2. (a) CPU (b) parallel 3. (a) Memory (b) serial 4. (a) Memory (b) parallel All the following types of information are transferred over buses except which type? 1. Power 2. Data 3. Commands 4. Instructions The preferred method of transfer for data/information between system components is which of the following? 1. Control bus 2. Common data bus 3. Operand bus 4. Address bus What IEEE standard is used for a simple 32-bit backplane bus? 1. 1196 2. 1296 3. 896.1 4. 1014 A. Control bus B. Address bus C. Data bus D. Instruction (I) bus E. Operand (C) bus F. I/O mem bus or IOC bus G. Time multiplexed bus H. DMI bus Figure 6-A.—Buses. IN ANSWERING QUESTIONS 6-5 THROUGH 6-11, REFER TO FIGURE 6-A. SELECT THE NAME(S) OF THE BUS OR BUSES THAT IS/ARE DESCRIBED IN EACH QUESTION. 6-5. 6-6. 6-7. Has all the signals necessary to define any of the possible memory address locations within the computer or a module. 1. A 2. B 3. C 4. D Can be used to transfer instructions from memory to the CPU. 1. A 2. B 3. C only 4. Both C and D Allows communication between the CPU and memory or the CPU and the IOC. 1. C 2. D 3. E 4. F 35
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6-8. 6-9. 6-10. 6-11. (b) source (b) destination6-12. 6-13. Controlled by the IOC; responds to the CPU by using the O bus. 1. E 2. F 3. G 4. H Transmits individual signals to control and coordinate the operations of the computer. 1. A 2. B 3. C 4. D Transmits addresses and data by using clock cycles. 1. E 2. F 3. G 4. H Acts as a requester; sends requests from other computers. 1. E 2. F 3. G 4. H What device accepts requests and uses a priority network to determine the order in which it is to respond to the requesters? 1. Operand bus extender 2. REI bus extender 3. CPU 4. DMI Regardless of whether a computer has an IOC or not, the CPU will control all buses. 1. True 2. False 6-14. 6-15. 6-16. 6-17. 6-18. 36 In bus communications, which of the following factors relating to the data being transferred must be considered? 1. Source only 2. Destination only 3. Transfer priority only 4. Source, destination, and transfer priority Bus requests may be made by all of the following parts except which one? 1. CPU 2. IOC 3. Memory 4. DMI Holding registers are used by source and destination sections to prevent data loss and to help coordinate data exchange. 1. True 2. False In the exchange of data on the buses, (a) what logic generates a ready signal when data is in the holding register and on the bus and (b) what logic sends an accept signal? 1. (a) Source (b) source 2. (a) Source (b) destination 3. (a) Destination 4. (a) Destination Which of the following items is/are stored in main memory? 1. Data and programs only 2. Calculations and operands only 3. Data, programs, and PROMS 4. Data, programs, calculations, and operands
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A. Memory address B. Capacity C. Access time D. Destructive readout E. Non-destructive readout F. Volatile memory G. Nonvolatile memory Figure 6-B.—Terminology. IN ANSWERING QUESTIONS 6-19 THROUGH 6-24, REFER TO FIGURE 6-B. SELECT THE TERM THAT MATCHES THE DESCRIPTION IN EACH QUESTION. 6-19. 6-20. 6-21. 6-22. Time interval from the instant a request for data is initiated until the data is available for use. 1. A 2. B 3. C 4. D The output side of a flip-flop is read from memory without having to be rewritten. 1. D 2. E 3. F 4. G The power to the computer is turned off and the contents of memory are retained. 1. D 2. E 3. F 4. G The particular location of a larger memory array where a packet of information is located. 1. A 2. B 3. C 4. D 6-23. 6-24. 6-25. 6-26. 6-27. 6-28. Power is shut off to the computer and the contents of the semi-conductor memory are lost. 1. D 2. E 3. F 4. G The data is lost when it is read from memory. 1. A 2. B 3. C 4. D A memory unit that can receive requests from more than one CPU or I/O section is known as which of the following types of memories? 1. Memory pcb 2. Single-inline memory module 3. Multiported memory module 4. Dual-action memory module Pcb type memories are usually composed of which of the following memory types? 1. 2. 3. 4. Semiconductor Core Film Both 2 and 3 above In a typical square form memory, the intersection of an x row and y column is called a 1. memory word address 2. memory word 3. memory module 4. memory cell The x rows and y columns of a typical memory will be equal in number. 1. True 2. False 37
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6-29. 6-30. 6-31. 6-32. 6-33. 6-34. Memory operations in most computers usually include which of the following items? 1. Control circuits 2. Timing circuits 3. Memory cycle 4. All of the above Memory interface circuits include which of the following items? 1. Address register 2. Communication lines 3. Interfacing register 4. Both 2 and 3 above A word is read from memory, then rerouted back through the Z register to be rewritten. This is what type of memory? 1. Non-destructive readout 2. Destructive readout 3. Hardwired 4. ROM The priority of a memory request is evaluated by which of the following devices? 1. Control circuits 2. Address register 3. Z register 4. C P U Memory read/write enables are provided by which of the following devices? 1. Control circuits 2. Timing circuits 3. CPU 4. I/O control During a complete memory cycle, which of the following actions occurs first? 1. Registers used for read/write operations are cleared 2. Enables are generated to gate memory address into registers used for read/write operations 3. Memory address translation is accomplished 4. Interface logic acknowledges reading data from memory 6-35. To locate a memory address word, the computer uses which of the following items in memory? 1. Timing circuits 2. Control circuits 3. Interface circuits 4. Memory logic 6-36, 6-37. 6-38. 6-39. 6-40. 38 The conversion from a logical to a physical memory address is a function of which of the following items in memory? 1. Memory logic 2. Timing circuits 3. Control circuits 4. Interface circuits In all computers, for every read operation there will always be a corresponding write operation. 1. True 2. False Increasing memory speed using interleaving requires which of the following items? 1. Memory modules of 32 bits 2. A minimum of 8 memory modules 3. More complex CPU and memory control circuitry 4. All of the above When odd parity is used for memory fault detection, all words stored in memory will have which of the following bits? 1. A logic 1 parity bit 2. A logic 0 parity bit 3. An even number of set bits stored at each memory location 4. An odd number of set bits stored at each memory location The memory protection register set is used for which of the following purposes? 1. To restrict read/write operations in portions of memory 2. To protect memory from unplanned power loss 3. To protect against erroneous write instructions 4. To limit access of memory to authorized users
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6-41. In a memory segment within the protected area with all three bits of the memory protection control register set, which of the following operations are allowed? 1. Execute protected 2. Write protected 3. Read protected 4. All of the above 6-42. Memory lockout is used by larger computers to prevent access to particular areas of memory by task state instructions. Which of the following statements describes the lockout function? 1. It is disabled when the CPU enters a particular executive or interrupt state and enabled when the CPU enters the task state 2. It is enabled when the CPU enters a particular executive or interrupt state and enabled when the CPU enters the task state 3. It is enabled when the CPU enters a particular executive or interrupt state and disabled when the CPU enters the task state 4. It is disabled when the CPU enters a particular executive or interrupt state and disabled when the CPU enters the task state 6-43. Compared with semiconductor memories, magnetic memories have which of the following advantages? 1. They cost less 2. They are faster in terms of storage and access 3. They require less power and they are volatile 4. They require less power and they are nonvolatile 6-44. The state of a core or film is changed by which of the following conditions? 1. Current flow in the opposite direction of sufficient magnitude to overcome the magnetic field and to magnetize in the new direction 2. Current flow in the same direction of sufficient magnitude to match the magnetic field and to magnetize in the old direction 3. Voltage amplitude of a sufficient magnitude to overcome the magnetic field and to magnetize in the new direction 4. Current flow in the opposite direction of sufficient magnitude to overcome the magnetic field and to magnetize in the old direction 6-45. Compared with core memory, film memory has which of the following advantages? 1. Increased speed of read/write operations and less power required 2. More compact and durable 3. Twice as many memory cells can be put in the same space for the same amount of power 4. All of the above 6-46. Each ferrite core can store what total number of bits? 1. One 2. Two 3. Three 4. Four 6-47. In a four-wire core winding, what is the physical make up of the windings that are strung through each and every core? 1. 1 drive line, 1 sense line, and 1 inhibit line 2. 2 drive lines, 1 sense line, and 2 inhibit lines 3. 2 drives lines, 1 sense line, and 1 inhibit line 4. 2 drive lines, 2 sense lines, and 1 inhibit line IN ANSWERING QUESTIONS 6-48 THROUGH 6-51, SELECT THE CORE LINE THAT MATCHES THE DESCRIPTION IN EACH QUESTION. 1. Drive line 2. Sense line 3. Inhibit line 39
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6-48. 6-49. 6-50. 6-51. 6-52. 6-53. 6-54. 6-55. Detects the change in state of the core from one to zero. Each line provides 1/2 of the current necessary to change the state of the core. Prevents changing the core from a zero to a one. In a three-wire core, this line performs the same function as in the four-wire core. To simplify addressing, reading, and writing operations, magnetic cores are arranged in which of the following ways? 1. In hierarchical patterns 2. In matrices 3. In planes 4. In stacks Which core in an array will be switched from one state to another? 1. A core with a full read or write current passing through it 2. A core with a half read current passing through it 3. A core with a half write current passing through it 4. A core with a half read or write passing through it In a core array the inhibit line is threaded in (a) with the x or y drives lines (series, parallel) and the sense line is threaded through (b) core. (each, every other) 1. (a) Series (b) each 2. (a) Parallel (b) each 3. (a) Series (b) every other 4. (a) Parallel (b) every other What is the basic building block of the memory stack? 1. Matrix 2. Array 3. Plane 4. Quadrant 40 6-56. 6-57. 6-58. 6-59. 6-60. The address register bits are used to translate the bits to make which of the following bit selections? 1. Stack only 2. Inhibit upper and lower stack only 3. X and Y primary, secondary, and diode only 4. X and Y primary, secondary, and diode; stack; and inhibit upper and lower stack Which selectors are activated only when writing zeros? 1. Inhibit 2. X and Y primary 3. X and Y secondary 4. X and Y read/write diode In a core read/write cycle, the read current is designed to change the state of the core(s) to (a) what value; and the write current is designed to change the state of the core(s) from (b) what value to (c) what value? 1. (a) Zero (b) zero 2. (a) Zero (b) one 3. (a) One (b) zero 4. (a) One (b) one (c) one (c) one (c) one (c) one The process of reading cores to the zero state is known as which of the following types of readout? 1. 2. 3. 4. Destructive readout Non-destructive readout Volatile readout Nonvolatile readout In a core memory, a restore cycle is necessary after data has been read from memory for what reason, if any? 1. To change the state of each selected core from zero to one 2. To change the state of all the cores from one to zero 3. To sense the state of each core 4. None, a restore cycle is not needed
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6-61. During a restore operation of zeros in a three-wire core, the absence of write current on which of the following lines will leave the cores in the zero state? 1. Digit 2. Word 3. X drive 4. Y drive 6-62. What specific number of paired film spots is used for each bit position? 1. One 2. Two 3. Three 4. Four 6-63. Current flow through which of the following lines will magnetize a film spot? 1. Drive 2. Word only 3. Sense/digit only 4. Word or sense/digit, depending on the function 6-64. In the application of external fields, the longitudinal fields are produced by passing the current (a) in which of the following ways and the transverse fields are produced by passing the current (b) in which of the following ways? 1. (a) Down the word line (b) In the proper direction along the sense/digit line 2. (a) In the proper direction along the word line (b) Down the sense/digit line 3. (a) In the proper direction along the sense/digit line (b) Down the word line 4. (a) In the proper direction along the sense/digit line (b) Down the drive line 6-65. In a film memory, a packet stores what specific number of bits of data? 1. One 2. Two 3. Three 4. Four 6-66. Which, if any, of the following devices makes the mated film cells less susceptible to the disturbance from other cells in close proximity to them? 1. Ground plane 2. Insulator 3. Keeper 4. None of the above 6-67. How is mated film memory structured? 1. Bit organized 2. Stack organized 3. Word organized 4. Array organized 6-68. What item is the basic building block of the film memory stack? 1. Matrix 2. Array 3. Packet 4. Plane 6-69. The memory capacity of a film core storage device is determined by which of the following factors? 1. Size of the computer 2. Number of packets only 3. Size of the array in the memory stack only 4. Number of packets and the size of the array in the memory stack 6-70. In film storage, up to how many words can be selected at each memory location? 1. One 2. Two 3. Three 4. Four 41
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6-71. 6-72. 6-73. The address register bits used to translate the bits to make selections are processed in which of the following sequences? 1. Word at the address location, memory location, and stack 2. Stack, word at th eaddress location, memory location 3. Word at the address location, stack, and memory location 4. Stack, memory location, and word at the address location A mated film memory cell is read by which of the following methods? 1. A current is generated along the digit line and a transverse field is applied to the thin film cell 2. A current is generated along the sense line and a transverse field is applied to the thin film cell 3. A current is generated along the word line and a transverse field is applied to the thin film cell 4. A current is generated along the word line and a longitudinal field is applied to the thin film cell What factor will determine the recorded state of the film? 1. The direction of the cell vector rotation induced film signal on the sense/digit line 2. The direction of the cell vector rotation induced film signal on the word line 3. The magnitude of the cell vector rotation induced film signal on the digit line 4. The direction of the cell vector rotation 6-74. 6-75. When a one is to be stored, (a) what is the direction of the bit current in relationship to that used to store a zero and (b) what field steers the vector to the one state? 1. (a) The same (b) Transverse 2. (a) The same (b) Longitudinal 3. (a) Reversed (b) Transverse 4. (a) Reversed (b) Longitudinal In a restore operation of a film memory, what factor determines the direction of the digit current on the sense/digit line? 1. Binary value of the data register 2. Direction of current on the word line 3. The easy axis 4. The hard axis induced film signal on the sense line 42
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ASSIGNMENT 7 Textbook Assignment: “Computer Memories,” chapter 6, pages 6-20 through 6-32; and “Input/Output (I/O) and Interfacing,” chapter 7, pages 7-1 through 7-20. 7-1. Semiconductor memories are known by all of the following terms except which one? 1. Read/write memory 2. Scratch-pad memory 3. Random access memory 4. Read-only memory 7-2. Semiconductor memories have which of the following characteristics? 1. Destructive readout and volatile 2. Destructive readout and nonvolatile 3. Non-destructive readout and volatile 4. Non-destructive readout and nonvolatile 7-3. Each RAM chip contains which of the following items? 1. One memory cell only 2. One memory cell and the logic to support it only 3. Large numbers of memory cells only 4. Large numbers of memory cells and the logic to support them 7-4. On RAM chips, memory cells are organized based on which of the following factors? 1. Number of memory words only 2. Number of bits per word only 3. Number of memory words and number of bits per word 4. Number of gate arrays 7-5. The transistors used in flip-flops of static RAM may be MOS or bipolar. Compared to MOS, bipolar has what advantage, if any? 1. Higher density 2. Higher access speed 3. Requires less space 4. None, they both have the same advantages 7-6. In a static RAM, the address lines are used to enable the addressed memory cell flip-flop circuit by row and column number. 1. True 2. False IN ANSWERING QUESTION 7-7, REFER TO FIGURE 6-31 ON PAGE 6-24 OF THE TRAMAN. 7-7. Data is stored into, or read from, the memory cells of SRAM via a total of how many lines? 1. O n e 2. Two 3. Three 4. Four 7-8. The (a) address lines and the (b) I/O data lines are usually tied to what buses? 1. (a) Computer or memory system bus (b) Computer or memory system bus 2. (a) Computer or memory system bus (b) Data bus 3. (a) Data bus (b) Computer or memory system bus 4. (a) Data bus (b) Data bus 7-9. During a SRAM read cycle, what is (a) the status of the write enable and (b) the mode of the data buffers? 1. (a) True (b) input 2. (a) True (b) output 3. (a) False (b) input 4. (a) False (b) output IN ANSWERING QUESTION 7-10, REFER TO FIGURE 6-32 ON PAGE 6-25 OF THE TRAMAN. 43
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7-10. Each dynamic RAM cell consists of which of the following devices? 1. 2. 3. 4. One MOS transistor only One tiny capacitor only One MOS transistor and one tiny capacitor only Many MOS transistors and several tiny capacitors 7-11. DRAM cells do not retain their charged state for 7-12. 7-13. 7-14. more than a few milliseconds. This degradation is due to which of the following factors? 1. Time only 2. Temperature only 3. Time and temperature 4. Temperature and power To retain their charged state, DRAMs must be refreshed. Of the following methods, which one is (a) more cost effective because it uses what (b) device? 1. (a) (b) 2. (a) (b) 3. (a) (b) 4. (a) (b) Internal Battery backup Internal Single refresh address generator External Battery backup External Single refresh address generator In DRAM organization, the data input and data output lines may be tied together in what type of application, if any? 1. 2. 3. One that uses a unidirectional data bus One that uses a bidirectional data bus None, they are never tied together Compared to a SRAM, a DRAM has all except which of the following advantages? 1. It retains its charged state 2. It has lower power consumption 3. It has higher density 4. It is less complex 44 7-15. 7-16. Programs stored on ROM are often referred to as firmware for which of the following reasons? 1. They are software only 2. They are hardware only 3. They are more hardware than software 4. They write data into the ROM address Compared to RAM, ROM has all of the same operational characteristics except which of the following? 1. Allows random access 2. Uses a row/column arrangement 3. Can be read by normal computer accessing methods 4. Can be written to by normal computer accessing methods 7-17. ROM has what primary use? 1. 2. 3. 4. Stores data addresses for recovery purposes Allows the computer to perform I/O operations Provides a user interface through a panel Stores the content of the computer registers for interrupt processing — 7-18. The acronym BIOS stands for what term? 1. Basic input/output system 2. Bipolar input/output status 3. Binary input/output status 4. Bidirectional input/output system 7-19. The acronym NDRO stands for what term? 1. 2. 3. 4. Non-destructive readover Non-destructive readout Non-dynamic readover Non-dynamic readout IN ANSWERING QUESTION 7-20, REFER TO FIGURE 6-35 ON PAGE 6-28 OF THE TRAMAN.
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7-20. In the example, the ROM chip memory array has a total of (a) how many decoders and (b) how many lines are input to these decoders? 1. (a) 2 (b) 12 2. (a) 2 (b) 13 3. (a) 4 (b) 12 4. (a) 4 (b) 13 7-21. ROMs may be made of which of the following materials? 1. Hardwired and magnetic only 2. Fusible links only 3. MOS and bipolar transistors only 4. Hardwired, magnetic, fusible links, and MOS and bipolar transistors 7-22. To perform ROM operations, which of the following circuits are used? 1. Timing and control signals only 2. Registers, flip-flops, and internal buses only 3. Internal buses, timing, and control signals only 4. Timing, control signals, registers, flip-flops, and internal buses 7-23. Compared to PROM, an erasable PROM has what additional advantage, if any? 1. It can be used over and over again without reprogramming 2. It can be erased and reprogrammed 3. It can be field programmed by an authorized technician 4. None, there is no additional advantage 7-24. While still in the circuit, which of the following PROMS can (a) be programmed and (b) erased? 1. (a) EAPROM/EEPROM (b) EAPROM/EEPROM 2. (a) EAPROM/EEPROM (b) UV EPROM 3. (a) UV EPROM (b) EAPROM/EEPROM 4. (a) UV PROM (b) UV PROM 7-25. 7-26. 7-27. 7-28. 7-29. A device that serves as a shared entry point from a local-area network into a larger information resource is which of the following? 1. Gateway 2. Input/output adapter (IOA) 3. Input/output controller (IOC) 4. Data terminal equipment (DTE) A function that transfers status by using the appropriate control signals from a transmitting device to the receiving computer is which of the following? 1. Input data (ID) 2. Output data (OD) 3. External function (EF) 4. External interrupt (EI) The I/O processor controls which of the following transfers? 1. The transfer of data between registers 2. The transfer of information between main memory and the CPU 3. The transfer of timing signals between the ALU and the CPU 4. The transfer of information between main memory and the external equipments Establishing, directing, and monitoring transfers with external equipments are the functions of which of the following devices? 1. C P U 2. IOA 3. IOC 4. Bidirectional bus Changes to input and output control and data signal voltages are functions of which of the following devices? 1. CPU 2. IOA 3. IOC 4. Bidirectional bus 45
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7-30. The type of connectors for the I/O channels or ports will be dictated by which of the following factors? 1. Interfacing 2. Serial I/O 3. Parallel I/O 4. Voltage levels 7-31. The driver circuits are used for which of the following tasks? 1. To pass data to the IOC 2. To set/clear output registers 3. To pass interface signals to the IOC 4. To pass interface and data signals to the external equipments 7-32. External microcomputer I/O operations are usually 7-33< handled by which of the following devices? - 1. A single serial port 2. A single parallel port 3. A single printed circuit board 4. Multiple printed circuit boards Examples of consistencies found in the architecture of a computer’s I/O section include which of the following? 1. Types of external equipments 2. The arrangement and format of the information exchanged 3. The type and number of interfaces possible 4. The type of circuits used to process I/O information 7-34. If a printer senses a paper jam during a print operation, which of the following actions should occur? 1. A control word should be sent by the computer specifying an error condition 2. A control word should be sent to the computer specifying an error condition 3. A data word should be sent by the computer specifying a special condition 4. A data word should be sent to the computer specifying a special condition 7-35. Handshaking is also known by which of the following terms? 1. Function control word 2. External interrupt words 3. Both 1 and 2 above 4. Alphabetic and numeric data exchange 7-36. The type of interface used when all bits of 7-37. 7-38. 7-39. 7-40. 46 information represented by a byte or word are input or output simultaneously is known as which of the following formats? 1. Serial format 2. Parallel format 3. 8-bit word format 4. 32-bit word format Command instructions provide control over which of the following areas/operations? 1. 2. 3. 4. Main memory CPU operations IOC single and dual channel operations Interrupt driven I/O operations The I/O command start instruction accomplishes which of the following actions? 1. Specifies an IOC, then halts further CPU processing 2. References specific main memory addresses 3. Executes a previously stored IOC command 4. Indicates to the CPU that the command has been processed The CPU will delay processing while waiting for an I/O operation only during which of the following actions? 1. 2. 3. 4. Execution of input chain operations Execution of output chain operations Actual data transfer operations Executions of an I/O command start instruction The actual execution of chaining instructions is independent of the CPU. 1. True 2. False
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7-41. Input and output chains deal primarily with which of the following activities? 1. The processing of IOC control words 2. Specification of the locations of external status words 3. Transfer of blocks of information 4. Addresses provided by the load control memory command 7-42. Data transfer between the computer and external equipments will take place when which of the following conditions is/are met? 1. The memory areas for the data have been specified by the computer programs 2. The external equipment is ready to send or receive data and has sent a request signal 3. Initiate input/output or equivalent instruction is executed by the CPU 4. All of the above 7-43. Which of the following is one of the constants in all I/O operations? 1. Data words will always be limited to 16 bits 2. When the data transfer will begin 3. The circuitry required to connect external equipments 4. A serial data interface between the computer and external equipments 7-44. In I/O operations, communications with the external equipment require which of the following devices/operating modes? 1. An IOC 2. A single channel operating mode 3. Circuitry that specifies a sequence of events 4. A dual channel operating mode 7-45. When an index address in main memory is specified by an external equipment during an I/O operation, the computer is operating in which of the following modes? 1. Intercomputer channel mode 2. Externally specified index mode 3. Externally specified address mode 4. Dual channel mode 7-46. In I/O operations, which of the following is one of the primary uses of registers? 1. To enable and route data information only 2. To enable and route control information only 3. To enable and route both control and data information 4. To provide timing circuitry for I/O interfacing 7-47. Decoder circuits are used for which of the following purposes? 1. Main timing 2. I/O processors 3. Address translation 4. Data buffers 7-48. Status registers are used for which of the following purposes? 1. To enable and route data using the internal bus system 2. To hold or buffer data during interchanges between the very fast CPU and slower external equipments 3. To hold control data generated by main memory or the CPU when operating with very fast external equipments 4. To hold information for the CPU that indicates the operating condition and current activities of the external equipments 7-49. In computers with an IOC, once started the master clock can be stopped when which of the following actions occurs? 1. Computer master clear 2. External interrupt 3. Input data request 4. Output data request 7-50. In computers with an IOC, the master clock is started when which of the following actions occurs? 1. The computer is initially powered on 2. The computer is auto restarted 3. Both 1 and 2 above 4. An execute master clear is issued 47
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7-51. The I/O control circuits are controlled by which of 7-56. I/O control memory words are set aside in main the following means? 1. The CPU 2. The IOC 3. The I/O master clock 4. The computer program 7-52. A sequential set of memory locations that contains data to be sent out or an area that is set aside for data to be received is known by which of the following items? 1. An input register 2. An output register 3. Both 1 and 2 above 4. A buffer 7-53. Which of the following operations is/are unbuffered? 1. 2. 3. 4. Data is transferred between the computer and the external devices Data is exchanged between the CPU and the various parts of the computer Both 1 and 2 above Data is exchanged between external devices offline 7-54. The I/O processor’s sequencing circuits control which of the following actions? 1. The order in which events will be executed based upon the translated function code 2. The order in which memory addresses of data to be retrieved or stored will be acted on 3. The order in which external equipment output requests will be acknowledged 4. The order in which external interrupts will be acted on by the computer 7-55. The CPU interfaces with the I/O processor through which of the following means? 1. Special interface circuits 2. The CPU’s I/O instructions 3. The sequencing circuitry 4. The maintenance console memory to control which of the following actions? 1. Data transfers for I/O buffer functions 2. The sequence of I/O operations 3. Parallel operations 4. Serial operations 7-57. In parallel operations, each I/O channel has its own block of memory addresses for which of the following operations? 1. Input and output only 2. External function only 3. External interrupt operations only 4. Input, output, external function, and external interrupt operations 7-58. Serial operations are affected by which of the following factors? 1. 2. 3. 4. Character size, parity selection, and asynchronous interfacing only Parity selection, baud rate, and synchronous interfacing only Character size, parity selection, and synchronous and asynchronous interfacing only Character size, parity selection, baud rate, and synchronous and asynchronous interfacing 7-59. Monitor words are used for which of the following purposes? 1. To monitor external equipment status 2. To monitor bytes that are to be transferred by the pending operation 3. To store characters for comparison with received data characters 4. To monitor main memory for the next available address for chaining instructions 7-60. Another term for accumulator based I/O is which of the following? 1 Direct CPU interface 2. Direct memory access 3. Interrupt driven I/O 4. Memory mapped I/O 48
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7-61. The CPU handles all I/O transactions by executing one or more instructions for each word of information transferred. This process is known by which of the following terms? 1. Polled I/O 2. Memory mapped I/O 3. Interrupt driven I/O 4. Accumulator based I/O 7-62. In memory mapped I/O, the CPU accesses the I/O device by which of the following means? 1. Tieing peripheral devices directly into the communication bus 2. Placing appropriate addressing information on the bus 3. Checking each channel or port to determine if it has data for input or is ready to accept output data 4. Using an I/O processor for interface between memory and the external equipments 7-63. During direct CPU interface operations, the CPU continuously tests the status register. This technique is known by which of the following terms? 1. Memory mapped I/O 2. Accumulator based I/O 3. Interrupt driven I/O 4. Polled I/O 7-64. The main advantage of direct memory access is which of the following? 1. Speed 2. Reliability 3. Less complicated circuity 4. Maximum utilization of memory 7-65. When the CPU and the DMA attempt to access main memory simultaneously, the CPU has priority. 1. True 2. False 7-66. When a high speed disk drive is used, output data will be in which of the following forms? 1. Octal 2. Binary 3. Octal coded decimal 4. Various; form is dependent on type of interface used 7-67. The technique used when more than one peripheral device is connected to a single port/channel is known by which of the following terms? 1. Daisy chaining 2. Independent request control 3. External interrupt control method 4. Request/acknowledge control method 7-68. When more than one peripheral device is connected to a single port/channel, the priority of a device is determined by which of the following factors? 1. The CPU 2. The I/O controller 3. The computer program 4. The order of connection 7-69. When using a request and acknowledge system, the priority of the functions and channels is determined by which of the following factors? 1. The CPU 2. The I/O controller 3. The computer program 4. The order of connection 7-70. Communication formats are governed by which of the following items? 1. The type of external equipment 2. The speed of the external equipment 3. The interfacing standard 4. The speed of the computer 49
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7-71. 7-72. The compatibility of voltage levels between the 7-74. computer and external equipments is ensured by which of the following means? 1. The CPU 2. The I/O processor 3. The I/O interfacing components 4. The type and number of pins in the cable connectors 7-75. Transfer of data within a digital computer is accomplished internally using which of the following means? 1. Standard I/O interfaces 2. Serial format 3. Parallel format 4. Serial interface board 7-73. The conversion of data for transmission over a serial channel is accomplished by which of the following means? 1. A serial interface board 2. A standard format interface 3. A universal receiver-transmitter 4. I/O control printed circuit board 50 When a universal synchronous-asynchronous receiver transmitter is used, it functions as which of the following devices? 1. A microprocessor 2. An I/O serial interface board 3. An I/O parallel interface board 4. A peripheral device to the microprocessor The universal synchronous-asynchronous receiver transmitter’s specific asynchronous interfacing is controlled by which of the following means? 1. The bidirectional tristate data bus 2. The I/O control printed circuit board 3. The read/write control logic 4. The CPU
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ASSIGNMENT 8 Textbook Assignment: “Input/Output (I/O) and Interfacing,” chapter 7, pages 7-20 through 7-38. 8-1. 8-2. 8-3. 8-4. The read/write control logic accepts control signals from which of the following devices? 1. The data bus 2. The control bus 3. The master clock 4. The USART To program the USART for the applicable interface when it is in an idle state, which of the following signals/words is required? 1. A reset signal 2. A clock signal 3. A new set of data words 4. A new set of control words The universal synchronous-asynchronous receiver transmitter is enabled for reading/writing operations when which of the following signals is true? 1. The WRITE DATA 2. The CHIP SELECT 3. The CONTROL DATA 4. The DATA SET READY When the WRITE DATA (WD) signal is true, it means which of the following things? 1. It indicates the microprocessor is placing data on the data bus 2. It indicates the microprocessor is ready to receive data or control words 3. It identifies the write operation as a data or control word 4. It enables the universal synchronous/asynchronous receiver transmitter for writing operations 8-5. 8-6. 8-7. 8-8. 8-9. When the READ DATA (RD) signal is true, the microprocessor is ready for which of the following activities? 1. To receive data only 2. To receive status words only 3. To receive data and status words 4. To receive clock signals The transmit control logic converts the data bytes stored in the transmit buffer into which of the following forms? 1. An asynchronous bit stream 2. Start bits 3. Stop bits 4. Parity bits A start bit is used for which of the following purposes? 1. To initiate data transfer 2. To alert the output device 3. To control transmit logic 4. To program protocol A parity bit is used for which of the following purposes? 1. To regulate signal flow 2. To specify data type 3. To detect errors 4. Each of the above The receive buffer stores which of the following information? 1. The output bit stream 2. The protocol signals 3. Serial bytes 4. Parallel bytes 51
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8-10. 8-11. 8-12. 8-13. 8-14. The voltage and current characteristics of line drivers/receivers are dictated by which of the following factors? 1. The format 2. The interface 3. Channel/port configurations 4. Type of circuitry (TTL or MOS) The Type A (NTDS) Slow interface format is able to transmit what type(s) of bit groupings? 1. 16 only 2. 30 only 3. 32 only 4. 16,30, or 32, depending on the type of computer The data transmission rate for the Type A (NTDS) Slow format is limited by which of the following factors? 1. The requirement to convert data from serial to parallel 2. The type of equipment used 3. The large voltage change between logic states 4. The long distance the transmission must cover In the Type D (NTDS SERIAL) interface format, information frames are made up of what total number of bits? 1. 32 bits 2. 16 bits 3. 3 bits 4. 8 bits The Type D (NTDS SERIAL) interface format can transmit digital signals up to which of the following lengths? 1. 300 feet 2. 1000 feet 3. 1500 feet 4. The total length of the cable used regardless of its length 8-15. 8-16. 8-17. 8-18. 8-19. 8-20. 52 The Type E (NATO SERIAL) format requires which of the following I/O cables? 1. Coaxial 2. Triaxial 3. Dual coaxial 4. Twisted pairs The Type E (NATO SERIAL) format is most frequently used with which of the following equipment? 1. Mainframe computers 2. Minicomputers 3. Microcomputers The Type F (aircraft internal time division multiplex [TDM] bus) interface format transmits bit groupings consisting of what total number of bits? 1. 16 2. 20 3. 30 4. 32 The Type F (aircraft internal time division multiplex [TDM] bus) interface format can handle which of the following numbers of external devices on one channel? 1. 16 2. 30 3. 32 (including a bus controller) 4. 34 (including a bus controller) The Type G (RS-449) interface format primarily uses which of the following protocols? 1. Request acknowledge 2. Command and response 3. SIS/SOS 4. Interrupt/request The Small Computer System Interface (ANSI X3.131) using one controller can daisy chain up to what maximum number of units? 1. 8 2. 16 3. 30 4. 32
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8-21. The RS-232 interface can be used for which of 8-22. 8-23. 8-24. 8-25. the following types of transfers? 1. Asynchronous parallel only 2. Synchronous parallel only 3. Asynchronous and synchronous parallel 4. Asynchronous and synchronous serial The RS-232 interface can be used with which of the following types of computers? 1. Micros only 2. Mainframes only 3. Minis and mainframes only 4. Micros, minis, and mainframes The RS-232 interface limits cable transfers to what maximum number of feet? 1. 50 2. 100 3. 300 4. 1000 In the RS-232 interface, most peripherals control configuration parameters using which of the following methods? 1. A controller card 2. Dip switches 3. Software 4. VACALES The higher transmission rate of the RS-422 interface is made possible by which of the following techniques? 1. Two separate wires are used 2. The receiver transition period is narrower 3. The grounding requirements are less critical 4. All of the above 8-26. In a token ring network, a station with a message waits until it receives a free token, it then changes the free token to a busy token, and transmits a block of data following the busy token. What term is used for the block of data? 1. Record 2. Server 3. Frame 4. File 8-27. The Ethernet interface is used to transfer which of the following types of data in what format? 1. Serial I/O data in packet format 2. Serial data in string format 3. Parallel I/O data in packet format 4. Parallel I/O data in string format 8-28. The type of cable used for the Ethernet interface is which of the following? 1. Twisted pairs 2. Unshielded coaxial 3. Shielded coaxial 4. Triaxial 8-29. Thin Ethernet interface used in smaller systems can have a maximum cable length of which of the following? 1. 500 feet 2. 600 feet 3. 1000 feet 4. 1500 feet 8-30. The Centronics Compatible Parallel interface uses which of the following types of protocol? 1. Command/acknowledge 2. Interrupt driven 3. Asynchronous 4. Synchronous 8-31. Most floppy disk drives today are controlled by which of the following interfaces? 1. Enhanced small device interface 2. ST-506/412 interface 3. Integrated drive electronics interface 4. RS-422 interface 53
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8-32. 8-33. 8-34. 8-35. 8-36. 8-37. When the ST-506/412 interface is used, the controller card performs which of the following functions for disk drives? 1. Moves the magnetic head 2. Spins the magnetic disk 3. Strips off formatting and control words 4. All of the above When the ST-506/412 is used to interface a hard disk drive, which of the following cabling is required? 1. A 34-pin control cable 2. A 20-pin data cable 3. Both 1 and 2 above 4. A shielded coaxial cable When the ST-506/4 12 is used to interface a floppy disk drive, which of the following cabling is required? 1. A 34-pin control cable 2. A 20-pin data cable 3. Both 1 and 2 above 4. A shielded coaxial cable The enhanced small device interface can transfer data at up to which of the following rates? 1. 5 megabits per second 2. 24 megabits per second 3. 125 megabits per second 4. 1.2 gigabytes per second When the enhanced small device interface is used with a floppy disk drive, which of the following cabling is required? 1. A 34-pin control cable 2. A 20-pin data cable 3. Both 1 and 2 above 4. A shielded coaxial cable All electronics used for the integrated drive electronics interface are located in which of the following areas? 1. The computer motherboard 2. The controller card 3. The integrated CPU 4. The hard drive 8-38. The integrated drive electronics interface can handle disk drives with what maximum capacity? 1. 1 MB 2. 80 MB 3. 180MB 4. 300 MB 8-39. What is the minimum number of conductors 8-40. 8-41. 8-42. 8-43. 54 required for I/O serial data operations? 1. 1 2. 2 3. 37 4. 4 During asynchronous data exchange, a frame of data must include which of the following bits at a minimum? 1. One start bit 2. One stop bit 3. Seven character bits 4. All of the above During asynchronous data exchange, what is the maximum number of bits for one frame of data? 1. 8 2. 9 3. 10 4. 11 Compared to asynchronous data exchange, synchronous data exchange has which of the following advantages? 1. Faster speed 2. More reliability 3. Less electronics required 4. Fewer bits required for each character The generally accepted standard connector for implementing an RS-232 connection has what total number of pins? 1. 12 2. 25 3. 26 4. 32
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8-44. The protective ground, pin 1, of the RS-232 8-45. 8-46. 8-47. 8-48. interface connector in the DTE/DCE mode should always be connected to the shielded cable shield at both ends. 1. True 2. False Pin 7 of the RS-232 interface connector in the DTE/DCE mode should always be connected at both ends for which of the following reasons? 1. 2. 3. 4. To complete the path for control signals only To provide a complete path for the data signals only To provide timing signals to the peripheral device only To provide a common reference for all signals Pin 3 of the RS-232 interface connector in the DTE/DCE mode is used for which of the following purposes? 1. To send data signals 2. To send control signals 3. To receive data signals 4. To receive control signals Pins 4,5,6, and 20 are used in the DTE/DCE mode using the RS-232 interface connector for which of the following purposes? 1. To send and receive data signals 2. To send and receive control signals 3. To send and receive timing signals 4. To establish the communications link In parallel data operations, the IOA or line driver/receiver provides the means to accomplish which of the following tasks? 1. Convert the byte or word to a sequential bit stream 2. Drive or detect the digital signals 3. Convert serial data to parallel data 4. Provide constant timing signals at the specified voltage levels 8-49. 8-50. 8-51. 8-52. 8-53. In parallel data operations, one I/O channel could consist of which of the following devices? 1. 2. 3. 4. Two cables, one for input and one for output or a single cable to handle both input and output Eight or more data lines A number of control lines All of the above The data strobe in single parallel cable operations is used for which of the following purposes? 1. 2. 3. 4. To check for data on the data lines To ensure that the data on the data lines is stable To signal the external device that data is ready to be read from the data lines All of the above In single parallel cable operations, a busy signal is sent under which of the following conditions? 1. The computer output buffer is full 2. The external equipment is not energized 3. The external equipment input buffer is full 4. The computer is involved in internal operations In two-cable parallel operations, an external interrupt enable can be described as which of the following signals? 1. A signal sent from the external device on the input line 2. A signal sent from the computer on the output line 3. A signal sent from the external device on the output line 4. A signal sent from the computer on the input line When an external interrupt code is placed on the data lines, it is accompanied by which of the following signals? 1. An external interrupt request 2. An input data acknowledge 3. An input data request 4. All of the above 55
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8-54. When the computer samples an interrupt code, which of the following signals will occur? 1. An external interrupt acknowledge 2. An external interrupt enable 3. An input data acknowledge 4. All of the above 8-55. In a two-cable sequence of events for input data, which of the following events occurs first? 1. The external equipment sets the IDR line 2. The external equipment places a word of data on the ID lines 3. The computer sets the input data request line 4. The computer clears the IDA line 8-56. In the two-cable sequence of events for input data, the computer has sampled the data on the ID lines. Which of the following events must occur before the computer will accept more data? 1. The IDR must be cleared 2. A new data word must be placed on the I/O lines 3. The IDR must be reset 4. All of the above 8-57. During a normal external function sequence of events, the computer places an EF code word on the OD lines. The next event to take place is which of the following? 1. The EFR line is set 2. The ODA line is set 3. The EFR line is cleared 4. The EFA line is set 8-58. During forced external functions, the computer does not require which of the following signals? 1. An EFR 2. An EFA 3. An ODR 4. An ODA 8-59. During the external interrupt sequence of events, what is the first event that must occur before a computer will accept an external interrupt? 1. The EI code word must be placed on the ID lines 2. The EIE line must be set 3. The EIR line must be set 4. The IDA line must be set 8-60. During the external interrupt sequence of events, the computer samples the EI code word on the ID lines and clears the EIE line for data to continue to transfer. Which of the following events must occur? 1. The computer must set the IDA line only 2. The external equipment must detect the setting of IDA line only 3. The computer must clear the IDA line only 4. The computer sets the IDA line, the external equipment must detect the setting of the IDA line, and the computer must clear the IDA line 8-61. All computers used by the Navy have EIE lines. 1. True 2. False 8-62. In intercomputer I/O operations when parallel channels are used, the input and output cables will have which of the following characteristics? 1. The input and output cables can be uneven in number 2. An ODA signal becomes a resume signal 3. An ODR signal becomes a ready signal 4. The input and output cables will be identical 8-63. During intercomputer I/O operations, command words include which of the following data? 1. External functions only 2. Forced external functions only 3. External function buffer words only 4. External functions, forced external functions, and external function buffer words 56
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8-64. During intercomputer I/O operations, command word functions are identified by use of which of the following techniques? 1. Flag words 2. Setting ODA lines 3. Additional interface signals 4. All of the above 8-65. During intercomputer I/O operations, for a buffered command word transfer to be possible, (a) the transmitting computer must have what line and (b) the receiving computer must have what line? 1. (a) EFR (b) EIE 2. (a) EFR (b) EFR 3. (a) EIE (b) EIE 4. (a) EIE (b) ERF 8-66. For an intercomputer command word buffered transfer, the receiving computer is ready to accept an external function command word. This is signaled by which of the following means? 1. The external function request line is set 2. The external interrupt enable line is set 3. The external function acknowledge is set 4. The input data request line is set 8-67. During an intercomputer command word buffered transfer, before putting the EF code on the data lines, the transmitting computer recognizes which of the following signals? 1. An EFR 2. An EFA 3. An ODA 4. All of the above 8-68. In intercomputer command word transfers when the transmitting computer does not have an EFR line, the command word will be transferred in what way, if any? 1. As a data word 2. As a buffered command word 3. As a forced command word 4. None, data cannot be transferred without an EFR line 8-69. In intercomputer I/O operations, all command words specified by the receiving computer’s EF buffer control words will be transferred one command word at a time. 1. True 2. False 8-70. Before the intercomputer data transfer sequence of events can begin, which of the following events must have occurred on the same channel? 1. An OD buffer must have been established on the transmitting computer 2. An ID buffer must have been established on the receiving computer 3. Both 1 and 2 above 4. An IDA must have been established 8-71. In intercomputer data transfers, the data word is held on the OD lines until the receiving computer performs which of the following tasks? 1. Sets the IDR line 2. Clears the IDR line 3. Sets the resume line 4. Clears the resume line 8-72. In intercomputer data transfer, the receiving computer recognizes the ready line of the transmitting computer as what line? 1. The IDR line 2. The ODR line 3. The ODA line 4. The resume line 8-73. In intercomputer data transfer, the transmitting computer recognizes the IDA line of the receiving computer as what line? 1. The IDR line 2. The ODR line 3. The ODA line 4. The resume line 57
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8-74. In intercomputer data transfer, after one data word has been transferred and before the next data word is placed on the data OD lines, which of the following events occurs? 1. The receiving computer sets the IDA line 2. The transmitting computer clears the ready line 3. Both 1 and 2 above 4. The receiving computer clears the EFR line
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ASSIGNMENT 9 Textbook Assignment: “Computer Instructions and Man/Machine Interfaces” chapter 8, pages 8-1 through 8-26. 9-1. 9-2. 9-3. 9-4. 9-5. Various programming languages and types of languages are used to write computer programs. Which of the following are examples of procedural-type languages? 1. 2. 3. 4. COBOL and FORTRAN COBOL and BASIC FORTRAN and BASIC BASIC and Ada For embedded applications, which of the following languages could be used? 1. BASIC 2. FORTRAN 3. COBOL 4. Ada Which of the following languages is considered an interactive language? 1. Ada 2. BASIC 3. COBOL 4. FORTRAN Before a program can be executed on a computer, it may need to be translated. Which of the following types of languages need to be translated? 1. High level only 2. Assembly only 3. High level and assembly 4. Machine code Computer instructions to perform designated operations are contained in an instruction set. Which of the following is another name for instruction set? 1. Operation set 2. Repertoire of instructions 3. Operating system instructions 4. Instruction formats 9-6. 9-7. 9-8. 9-9. 9-10. Other names for the plan used to write a program include which of the following terms? 1. Algorithm 2. Formula 3. Utility 4. Application Some programs are stored in ROM or PROM. Which of the following is another name used for these read-only programs? 1. Operating systems 2. Utilities 3. Hardwired 4. Applications What type of program provides the link between the computer hardware and the user and enables. the execution of operational programs? 1. Operating system 2. Application 3. Utility 4. User interface Operating systems are a collection of many programs used by a computer to manage its own resources and operations. All of the following are types of operating systems except which one? 1. 2. 3. 4. Programmed operational and functional Single tasking Multitasking Real-time Which of the following are names commonly used to describe the programs for tactical, tactical support, and/or nontactical applications? 1. Application programs only 2. Operational programs only 3. Operational and processing programs only 4. Application, operational, and processing programs 59
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9-11. Commercially available programs designed to solve specific classes of problems are often called by which of the following terms? 1. Packaged software only 2. Off-the-shelf software only 3. Packaged and off-the-shelf software 4. On-the-shelf software 9-12. All of the following are considered utility programs except which one? 1. POFA 2. Operating system 3. Online diagnostic test 4. General routine to copy a disk 9-13. A predetermined and installed set of microinstruction is called what type of instruction? 1. Multiple instruction 2. Microinstruction 3. Mini-instruction 4. Controlled instruction 9-14. Which of the following types of instructions are classified by the function they perform? 1. Transfer of control only 2. Movement and transfer of control, only 3. Movement, transfer of control and arithmetic only 4. Movement, transfer of control, arithmetic, and logical 9-15. Data assignment instructions are normally held in which of the following types of registers? 1. Flag registers only 2. Memory address registers only 3. Memory address registers and active status registers 4. Flag registers and active status registers 9-16. All of the following are examples of data assignment instructions except which one? 1. 2. 3. 4. Branch instruction address Fixed point overflow Interrupt lockouts Compare designators 9-17. 9-18. 9-19. 9-20. 9-21. What type of instruction makes it possible to change the sequence in which a computer performs instructions? 1. Data assignment 2. Arithmetic 3. Logical 4. Branch What type of instruction will change the sequence of instructions only if a condition is met? 1. Conditional branch 2. Unconditional branch 3. Logical branch 4. Automatic branch What type of instructions include and, or, not, exclusive or/nor, compare, and shift instructions? 1. Data assignment 2. Arithmetic 3. Logical 4. Branch In addition to being classified by their functions, instructions may be classified by their action on operands. 1. True 2. False Instructions are the same on all computers. 1. True 2. False 9-22. All instructions include at least which of the following parts? 1. An operation code 2. An operand address 3. A modifier code 4. A register name IN ANSWERING QUESTION 9-23, REFER TO FIGURE 8-3 ON PAGE 8-7 OF THE RAMAN. 60
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9-23. In a 16-bit microcomputer instruction, in what positions is the operation code located? 1. Bits 2 5 and 2 4 2. Bits 2 11 and 2 10 3. Bits 2 15 through 2 13 4. Bits 2 16 through 2 13 9-24. The formats of instructions on mainframe computers vary greatly for all of the following reasons except which one? 1. Manufacturer of the computer 2. Generation of the computer 3. Memory size of the computer 4. Type of computer QUESTIONS 9-25 THROUGH 9-33 PERTAIN TO THE EXAMPLE INSTRUCTION FORMATS FOR A MAINFRAME COMPUTER WITH 32-BIT INSTRUCTIONS ON PAGES 8-8 THROUGH 8-10 IN THE TRAMAN. 9-25. A total of how many basic instruction formats is given? 1. One 2. Five 3. Seven 4. Nine 9-26. Which of the following fields is/are consistent in all the instruction formats? 1. Designator field (a) only 2. Function code (f) only 3. Designator field (a) and function code (f) 4. Function code (f) and subfunction code (f 2) 9-27. The “a” field is used to identify all except which of the following registers? 1. Stack pointer 2. Accumulator 3. Memory 4. Index 9-28. Basic load, store, replace, and simple mathematical operations are performed using what instruction format? 1. I 2. II 3. IV-B 4. V 9-29, 9-30, 9-31. 9-32. 9-33. Format II instructions perform all except which of the following types of operations? 1. Interrupt 2. I/O commands 3. Single precision mathematics 4. Program sequence control jumps What is the maximum value of a subfunction code of (a) two bits and (b) three bits? 1. (a) 2 (b) 3 2. (a) 2 (b) 7 3. (a) 3 (b) 5 4. (a) 3 (b) 7 Formats IV-A and IV-B are half-word instructions and two of them may be stored in one memory word. Which of the following methods is used to keep track of upper/lower instruction execution? 1. Active status register 2. Indirect addressing mode 3. Monitor clock 4. Accumulator For operations such as setting, clearing, or testing an individual bit, what instruction format is used? 1. IV-B 2. IV-C 3. III 4. II For single- and double-precision floating-point math operations, what instruction format should be used? 1. I 2. II 3. III 4. V 61
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9-34. Which of the following are types of operand addressing? 1. Direct and indirect only 2. Extended, immediate, and implicit only 3. Indexed and relative only 4. Direct, indirect, extended, immediate, implicit, indexed, and relative 9-35. In which addressing mode is the operand itself contained in the instruction? 1. Extended 2. Immediate 3. Implicit 4. Relative 9-36. An instruction in which no operand address needs to be specified because the operation code contains all the information needed uses what addressing mode? 1. Extended 2. Immediate 3. Implicit 4. Indexed 9-37. Which addressing mode requires the operand address to be generated when the instruction is being prepared for execution? 1. Indexed operand 2. Immediate 3. Indirect 4. Direct 9-38. In relative addressing, what two items must be added together to obtain the correct instruction or operand address? 1. Base address and offset 2. Base address and memory register 3. Offset and index register 4. Memory word and memory register 9-39. Instruction sizes vary among types and generations of computers. They include which of the following sizes? 1. Character and full-word only 2. Full-word and half-word only 3. Full-word and double-length word only 4. Character, half-word, full-word, double- length word, and multiple word 9-40. Microcomputers commonly use instructions of what word lengths? 1. Multiple 2. Double 3. Full 4. Half 9-41. Man-machine interfaces have at least data entry and data display capabilities. 1. True 2. False 9-42. The data entry function of a man-machine interface is used to enter commands or set parameters for which of the following activities? 1. Test activities only 2. Computer operations only 3. Status and computer operations only 4. Computer operations, status, and test activities 9-43. When a computer is continually executing instructions one after another as directed by its logic circuits and software, it is in what operating mode? 1. Run 2. Step 3. Phase 4. Sequence 9-44. When you want to put the computer in the stop mode, which of the following methods can you use? 1. Manual action using STOP pushbutton 2. Program control using a STOP instruction 3. Both 1 and 2 above 4. Timing clock circuits 62
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9-45. What mode of - operation enables a technician to test the contents of registers and memory locations at the end of each instruction execution? 1. Run 2. Step 3. Phase 4. Sequence 9-46. Which of the following operating modes enable a technician to test conditions during the execution of an instruction? 1. Phase and sequence 2. Step and stop 3. Run and phase 4. Run and step 9-47. The purpose of master clear is to clear which of the following areas? 1. All I/O registers only 2. All CPU registers only 3. All I/O and CPU registers only 4. All memory locations only QUESTIONS 9-48 THROUGH 9-65 PERTAIN TO MICROCOMPUTERS. 9-48. With a microcomputer, all of the following methods are commonly used to inform the processor of the system configuration except which one? 1. Battery protected storage 2. Switchboard panels 3. DIP switches 4. Jumpers 9-49. Each switch in a dual-inline package (DIP) indicates ON/OFF status. DIP switches can be used in which of the following ways? 1. Each single switch indicates the status of a component only 2. Each single switch indicates a requirement of the system operator only 3. Single and/or combinations of switches indicate the status of a component or the requirements of the system operator 4. Two switches must be used together to indicate any operational status 9-50. Board mounted DIP switches are designed so you can manually set them during which of the following tasks? 1. Component installation only 2. Component removal only 3. Initial configuration only 4. Component installation and removal, and initial configuration 9-51. Jumpers have which of the following characteristics? 1. Jumper settings are considered temporary 2. Jumpers must be physically removed and reinserted 3. Jumpers can only be manually positioned during component installation 4. Only a single jumper maybe used to specify a configuration option 9-52. A jumper connector consists of which of the following parts? 1. A receptacle only 2. A plug only 3. A receptacle and a plug 4. A set of switches 9-53. Jumpers have what purpose? 1. To define the configuration of each pcb 2. To connect the communications cables from a computer to an external device 3. To bridge a loose connection inside a computer chassis 4. To set a series of conditions to affect data flow within external devices 9-54. Which of the following are examples of functions affected by jumpers? 1. Mode of operation 2. Clock speed and wait states 3. I/O connections 4. All of the above 9-55. Newer microcomputers have a hardware/configuration program stored as firmware. 1. True 2. False 63
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9-56. In newer microcomputers, configuration data may be stored in which of the following ways? 1. In ROM 2. In EPROM protected by a rechargeable battery 3. In RAM protected by a rechargeable battery 4. On disk or tape, depending on the microcomputer’s design 9-57. In microcomputers with battery protected storage, where is the battery located? 1. In the keyboard 2. On the backplane/motherboard 3. In an external battery pack 4. In the surge protector 9-58. DIP switches and battery protected storage provide different basic configuration data to the microcomputer. 1. True 2. False 9-59. All of the following are examples of system setup/configuration options except which one? 1. Date and time data 2. Floppy disk drive identifiers 3. Type of video display and refresh time period 4. ROM content 9-60. Microcomputers usually have which of the following types of power? 1. Ac only 2. Fixed time period rechargeable battery only 3. Ac and fixed time period rechargeable battery 4. Ac and variable time period rechargeable battery 9-61. A voltage or line select switch allows a microcomputer to operate in which of the following voltage ranges? 1. 100 to 130 only 2. 200 to 230 only 3. 100 to 130 and 200 to 230 only 4. 100 to 230 9-62. The keyboard and the monitor of a microcomputer provide for all except which of the following functions? 1. Control cooling and battle short conditions 2. Running software programs 3. Performing tests 4. Viewing results 9-63. Internal diagnostics are performed in the power on sequence. The computer notifies you (a) of errors in what way and (b) that everything is correct in what way? 1. (a) Displays an error message if possible (b) Displays a message telling you to load the disk operating system 2. (a) Displays a menu to enable you to run external diagnostics (b) Displays a message telling you to load the DOS 3. (a) Displays an error message if possible (b) Loads DOS and displays an appropriate DOS display 4. (a) Displays an error message always (b) Loads DOS and displays an appropriate DOS display 9-64. Compared to internal diagnostics, LEDs provide which of the following advantages? 1. They simplify diagnostic software 2. They are easier to read than displayed messages 3. They save random access memory space 4. They enable the operator to select tests 9-65. Under DOS, you can also use disk based diagnostics with test selection menus. These menus usually provide which of the information on the monitor? 1. Test selection only 2. Test status only 3. Test status and error indications only 4. Test selection, test status, and error indications 64
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9-66. In addition to providing information on the operating system and software programs, panels on some minicomputers provide which of following controls and indicators? 1. Power only 2. Temperature only 3. Power and temperature 9-67. Internal diagnostics, called built-in tests (BITs), are designed to perform tests on which of the following devices? 1. CPUs only 2. IOCs only 3. CPUs and IOCs only 4. CPUs, IOCs, and any optional circuits 9-68. The pass/fail results of BITs will be displayed on the front panel. To decipher an error code from a failed test result and find the location of the module that may fix the problem, you should take which of the following actions? 1. Ask the senior DS 2. Look at the fault isolation table 3. Write down the error code and submit it to the trouble-shooting desk 4. Write down the error code and submit it to your supervisor 9-69. To configure a mainframe computer for reduced capability, you need to know which of the following information? 1. The capabilities and limitations of the system only 2. How to set the controls and switches on the computer and the switchboard only 3. How to set the controls and switches on the switchboard panels and the display and communications subsystems 4. The capabilities and limitations of the system, and how to set the switches on the computer, the switchboard panels, and the communications subsystems 9-70. Power to a mainframe computer is critical. Which of the following methods may be used to ensure there is stable power? 1. Circuit breaker protection 2. Indicators for blower and logic to show if there is stable power 3. Interrupts to indicate power fluctuations 4. Each of the above 9-71. In addition to controls, switches, and pushbutton indicators, newer mainframe computers use which of the following devices to display status information and address the contents of registers? 1. Displays only 2. Keyboards only 3. Displays and keyboards 4. Keyboards and voice generated messages 9-72. On mainframe computers, internal diagnostics to test hardware and return pass/fail results may include which of the following types? 1. Diagnostics on tape or disk 2. Built-in tests (BITs) 3. Tests on NDRO 4. Both 2 and 3 above 9-73. To perform bootstrap on a minicomputer or mainframe computer, what type of memory is used? 1. DRAM 2. SRAM 3. CMOS RAM 4. NDRO 9-74. Inspect and change routines are used on minicomputers and mainframe computers for which of the following purposes? 1. To ensure the software is operating properly 2. To patch or revise software 3. To change hardware configurations 4. To change software/hardware interfaces 65
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9-75. In a mainframe or minicomputer, what determines which peripheral device will be used to execute bootstrap? 1. The positions of the jumpers 2. The position of the bootstrap switch 3. The position on a DIP switch 4. The position of the step switch 66
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ASSIGNMENT 10 Textbook Asignment: “Magnetic Tape Storage,” chapter 9, pages 9-1 through 9-21. 10-1. 10-2. 10-3. 10-4. 10-5. Which of the following types of storage is used to store large amounts of data that are not required by the computer on a regular basis? 1. Main memory storage 2. Secondary memory storage 3. Tertiary memory storage 4. Thin film memory storage Magnetic tape can be used to store large amounts of data in a variety of convenient package sizes. 1. True 2. False Which of the following materials can be used as a base for magnetic tape? 1. Plastic 2. Iron oxide 3. Rubber 4. Paper Which of the following materials can be used to form the oxide coating of a magnetic tape? 1. Gamma ferric oxide only 2. Chromium dioxide only 3. Gamma ferric oxide and chromium dioxide 4. Plastic Which of the following procedures should NOT be used when magnetic tapes are handled? 1. 2. 3. 4. Keep unused tapes in dustproof containers Keep containers free of dust and contaminants Store tapes in electromagnetically shielded cabinets Store tapes on the top of equipment 10-6. To identify magnetic tapes, use adhesive labels with which of the following characteristics? 1. Easily erasable 2. Adhere permanently to tape containers 3. Both 1 and 2 above 4. Easily removable without leaving a residue 10-7. You should store tapes in the same room where they are to be used for which of the following reasons? 1. To reduce handling only 2. To prevent variations in environmental conditions only 3. To reduce handling and to prevent variations in environmental conditions 4. To decrease the time needed to find the tape 10-8. When you receive a new tape, which of the following actions, if any, should you take? 1. Immediately mount the tape on a drive to read the information 2. Condition the tape to the environment in which it is to be used 3. Copy the tape as soon as you receive it 4. None; no special action is required 10-9. What effect, if any, may result if you touch the magnetic oxide of a tape? 1. 2. 3. The oils and acids from your skin could damage the tape Your fingers could turn brown from picking up bits of the oxide None; no effect 67
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10-10. A tape cleaner performs which of the following 10-15. What area of a magnetic tape tends to show the actions? greatest amount of wear? 1. It shaves the oxide of the tape only 1. The area just after BOT 2. It wipes down both sides of the tape with a 2. The area just before EOT cleaning solution only 3. The interrecord gap area 3. It first shaves the oxide side of the tape, then 4. The file mark it wipes down both sides of the tape with a cleaning solution 10-16. To correct a tape’s worn or damaged areas, which 4. It alters the flux patterns on the tape of the following actions should you take? 10-11. Which of the following maintenance actions 1. Degaussing reduces the static buildup on open reel magnetic 2. Cleaning tapes? 3. Stripping 4. Splicing 1. Degaussing 2. Cleaning 10-17. After stripping a magnetic tape, what is the 3. Certifying minimum length of tape you should leave on the 4. Stripping reel? 10-12. A tape certifier performs all of the following tasks except which one? 1. Cleans the tape 2. Erases the tape 3. Checks the tape’s ability to record high density data, to retain magnetic flux patterns, and to be demagnetized 4. Restores the original data to the tape 10-13. For a tape that cannot be certified, what action, if any, should you take? 1. Destroy it 2. Keep it for use as a scratch tape only 3. Put it into general use because the standards of a tape certifier are higher than they need to be 4. None; no action is required 10-14. To nullify all the magnetic flux patterns is the sole purpose of which of the following machines? 1. 500 feet 2. 400 feet 3. 300 feet 4. 200 feet 10-18. You should NOT splice a tape for which of the following reasons? 1. Tape splices are generally the weakest point on the tape 2. Read and write operations may not perform properly in the area of the splice 3. Splicing a broken tape usually will not save the data 4. All of the above 10-19. All tape media used in a system must be accounted for in which of the following ways? 1. Listed 2. Labeled only 3. Numbered only 4. Labeled and numbered 1. A cleaner 10-20. An operational program tape being delivered to a 2. A stripper system is considered which of the following types 3. A degausser of tape? 4. A certifier 1. New 2. Used 3. Master 4. Scratch 68
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10-21. 10-22. 10-23. A tape containing data that maybe written over is called what type of tape? 1. New 2. Used 3. Master 4. Scratch Master tapes must be protected from which of the following operations? 1. Read 2. Write 3. Copy 4. Duplication Tapes generated from a master tape are referred to by which of the following terms? 1. New 2. Used 3. Working copies 4. Scratch A. Submit the tape for stripping or cleaning/ certifying. B. Make a new working copy from the master. C. Remove the tape from the unit and clean the transport. D. Attempt to read or write the tape on different transport. E. Align the magnetic tape transport. Figure 10-A—Magnetic tape maintenance actions. IN ANSWERING QUESTIONS 10-24 THROUGH 10-26, SELECT FROM FIGURE 10-A THE PROPER MAINTENANCE ACTION TO CORRECT THE PROBLEM DESCRIBED IN THE QUESTION. 10-24. A working copy receives read errors from several tape transports. 1. A 2. B 3. C 4. D 10-25. 10-26. 10-27. 10-28. 10-29. 10-30. The tape has visible damage. 1. A 2. B 3. D 4. E A tape reads properly from all transports except one. 1. A 2. B 3. D 4. E What is the form taken by a tape after it has been wound on a reel? 1. Tape 2. Tape deck 3. Tape roll 4. Tape pack What winding error causes steps to be observed in the tape pack? 1. Windowing 2. Spoking 3. Pack slip 4. Cinching What tape condition is caused when a loosely wound tape is exposed to extreme heat or humidity? 1. Windowing 2. Spoking 3. Pack slip 4. Cinching What tape condition is caused when tension is increased toward the end of the winding operation? 1. Windowing 2. Spoking 3. Pack slip 4. Cinching 69
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10-31. 10-32. 10-33. 10-34. 10-35. Storage of data using a magnetic tape unit is based on which of the following principles? 1. 2. 3. 4. Current flow in a conductor can be generated by a change in the magnetic lines of force that cut through a conductor Changing the current flow in a conductor creates a change in the magnetic lines of force radiating from the conductor Both 1 and 2 above Current flow cannot be created by moving a conductor through a magnetic field - The electromagnetic-type conductor used to create a magnetic spot on a magnetic tape is called a 1. read head 2. write head 3. flux pattern 4. magnetic oxide A magnetic spot recorded on a magnetic surface may be sensed by an electromagnetic-type conductor called a 1. read head 2. write head 3. flux pattern 4. magnetic oxide Data stored on a magnetic surface may only be read once. 1. True 2. False A flux pattern magnetized in one direction to indicate a binary ONE and the opposite direction to indicate a binary ZERO is a characteristic of which of the following recording techniques? 1. Return-to-zero 2. Non-return-to-zero 3. Phase encoding 10-36. 10-37. 10-38. 10-39. 10-40. 10-41. 70 Using narrow current spikes to write small flux patterns is a characteristic of which of the following recording techniques? 1. Return-to-zero 2. Non-return-to-zero 3. Phase encoding A binary ONE indicated by a change in flux direction is a characteristic of which of the following recording techniques? 1. Return-to-zero 2. Non-return-to-zero 3. Phase encoding What recording technique, if any, provides for the highest data density? 1. Return-to-zero 2. Non-return-to-zero 3. Phase encoding 4. None; they all provide the same density An invisible line on a tape where data is written or read a bit at a time is called a 1. file 2. frame 3. record 4. track Data bits written concurrently across the width of the tape are called a 1. file 2. frame 3. record 4. track Which of the following terms indicates the density of data stored on multitrack tape? 1. Bits per inch 2. Characters per inch 3. Frames per inch 4. Records per inch
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10-42. A nine-track magnetic tape contains (a) what number of data bits and (b) what number of parity bits? 1. (a) 7 (b) 2 2. (a) 8 (b) 1 3. (a) 9 (b) 1 4. (a) 9 (b) O 10-43. In which of the following recording techniques is the presence of a frame indicated by the detection of a binary ONE? 1. Return-to-zero 2. Phase encoding 3. Non-return-to-zero 4. Non-return-to-zero indiscrete 10-44. When writing or searching for data, which of the following tape markings is a common starting point used by a system? 1. BOT 2. EOT 3. Both 1 and 2 above 4. IRG 10-45. Data cannot be written or read under which of the following conditions? 1. The tape is stopped 2. The tape is just starting to move 3. The tape is stopping movement 4. All of the above 10-46. The start/stop effect creates a blank spot on the tape until which of the following conditions is met? 1. The tape is up to speed 2. The tape is stopped 3. The tape is starting to move 4. The tape is stopping movement 10-47. A group of contiguous frames is called a 10-48. Record length is fixed by the magnetic tape device. 1. True 2. False 10-49. A file can be defined as a group of 1. bits 2. characters 3. frames 4. records 10-50. Every file on a tape ends with a 1. file mark 2. interrecord gap 3. parity bit 4. record 10-51. Which of the following parity checks uses each frame’s parity bit? 1. Odd 2. Even 3. Lateral 4. Longitudinal 10-52. The parity bit in a seven-track frame consisting of 011101 is a ONE for which of the following parity formats? 1. Odd 2. Even 3. Lateral 4. Longitudinal 10-53. Odd parity is commonly used with non-return-to-zero indiscrete recording for what purpose? 1. File mark 2. Frame identification 3. Interrecord timing 4. Tape speed 1. file 2. record 3. software 4. track 71
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10-54. Which of the following parity checks uses a check frame? 1. Odd 2. Even 3. Lateral 4. Longitudinal 10-55. Each bit in the check frame contains the parity bit for all the ONEs in a particular 1. file 2. frame 3. record 4. track 10-56. Which of the following is NOT a function of the magnetic tape controller? 1. Receives data and commands from the computer 2. Reformats data into frame-size bytes 3. Detects BOT 4. Checks parity 10-57. What is the tape speed for all read, write, and search operations, in inches per second? 1. 100 2. 120 3. 180 4. 200 10-58. Tapes without a write-enabling ring are protected from the write operation. 1. True 2. False 10-59. What MTU operation compares the first word of each record to a specified key? 1. Read 2. Search 3. Space file 4. Write 10-60. During a rewind operation, what signal will cause tape motion to stop? 1. BOT 2. EOT 3. Low tape 4. Start of file tape mark 10-61. MTU operations that can be performed offline using the microprogrammed controller (MPC) are determined by the MPC program installed by the 1. operator 2. computer 3. manufacturer 4. maintenance technician 10-62. What functional area of a magnetic tape unit decodes external function words from the computer? 1. System control panel 2. Maintenance panel 3. Magnetic tape transport 4. Control unit 10-63. The MPC transmits data via which of the following data buses? 1. Source bus only 2. Destination bus only 3. Source and destination buses 4. ROM bus only 10-64. Which of the following control unit functions is NOT performed by the MPC? 1. Frame count checking for lost frames 2. Start/stop delay initiation 3. Read/write signal amplification 4. Search operations comparisons 10-65. Which of the following components contains controls and indicators for manual offline operations? 1. The maintenance panel 2. The system control panel 3. The magnetic tape transport 4. The microprogrammed controller 72
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10-66. 10-67. 10-68. 10-69. 10-70. Which of the following components contains the controls and indicators for primary power and tape transport manual control? 1. The maintenance panel 2. The system control panel 3. The magnetic tape transport 4. The microprogrammed controller Of the following operations, which one is NOT performed by the magnetic tape transport (MTT) control section? 1. Providing control signals for manual operations of the MTT 2. Acting as an interface for MTU control signals and status responses 3. Sending signals to light the MTT switch panel indicators 4. Providing timing pulses and a servo-movement control signal to the capstan The direction and speed of the supply and take-up servo motors are controlled by which of the following factors? 1. 2. 3. 4. The size of the tape loop in the vacuum column The direction and speed of the capstan motor The capstan tachometer The function being performed Which of the following MTT sections controls the speed and direction of tape movement? 1. Air control solenoids 2. Capstan servo-control 3. Supply reel servo-control 4. Take-up reel servo-control The supply and take-up reel servo-driven hubs attempt to maintain the tape loops in which of the following positions as shown in figure 10-20? 1. Above sensor A 2. Below sensor D 3. Between sensors B and C 10-71. 10-72. 10-73. 10-74. 10-75. The speed and direction of the servo-driven hubs are controlled by all of the following conditions except which one? 1. 2. 3. 4. Capstan direction and velocity Reel tachometer input Vacuum/pressure sensors in the buffer columns Read or write operation being performed Which of the following diagnostic programs is/are controlled by the MPC ROM? 1. POFA 2. PEFT 3. Internal diagnostics 4. All of the above Which of the following diagnostic programs is/are run under the control of the operational program? 1. 2. 3. 4. POFA PEFT Internal diagnostics All of the above Which of the following POFA tests checks the ability of the MTU to respond to computer commands and to provide status and error condition information to the computer? 1. The duplex test 2. The extended operation test 3. The function and format test 4. The transport compatibility test Which of the following POFA tests checks the MTU’s ability to read the same tape on several MTTs? 2. The extended operations test 3. The function and format test 4. The transport compatibility test 1. The duplex test 4. Between sensors A and D 73
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ASSIGNMENT 11 Textbook Assignment: “Magnetic Disk Storage,” chapter 10, pages 10-1 through 10-21. 11-1. Magnetic disks are generally used as which of the following types of storage? 1. 2. 3. Main memory Secondary storage Tertiary storage 11-2. The original fixed disk had what maximum capacity? 1. 5 megabytes 2. 10 megabytes 3. 20 megabytes 4. 50 megabytes 11-3. The first floppy disks had (a) what diameter and (b) maximum storage capacity? 1. (a) 5 in. (b) 180K 2. (a) 5 in. (b) 360K 3. (a) 8 in. (b) 180K 4. (a) 8 in. (b) 360K 11-4. The top and bottom surfaces of a removable disk pack are usually used for what purpose? 1. Data storage 2. Protection 3. Servo data 4. Indexing 11-5. Fixed disks have which of the following characteristics? 1. They are small sealed units with one or more platters 2. They are easily removed from the computer 3. They are only used with mainframe computers 4. They are not broken 11-6. 11-7. 11-8. 11-9. The 5.25-inch floppy disk is available with which of the following densities? 1. 360K only 2. 720K only 3. 1.2M only 4. 360K, 720K, and 1.2M The 3.5-inch floppy disk is available with which of the following densities? 1. 360K only 2. 720K only 3. 1.44M only 4. 720K and 1.44M Formatting a disk performs which of the following operations? 1. Writes tracks only 2. Writes sectors only 3. Writes cylinders only 4. Writes tracks and sectors Concentric rings used to store data on disk are called 1. bytes 2. tracks 3. records 4. cylinders 11-10. Track 00 is physically located on a disk’s recording surface in which of the following places? 1. Top track 2. Bottom track 3. Innermost track 4. Outermost track 74
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11-11. A cylinder address number is composed of which of the following numbers? 1. Cylinder number only 2. Track number only 3. Sector number only 4. Cylinder number, sector number, and head number 11-12. In a personal computer, which of the following data management areas is NOT created by the DOS 1 format program? 1. Root directory 2. Subdirectory 3. Disk boot sector 4. File allocation table 11-13. A new fixed disk installed in a personal computer needs to have what operation(s), if any, run before it is ready to store data? 1. Format only 2. High-level format only 3. Format and high-level format 4. None; new disks are ready to run 11-14. In a personal computer using DOS version 5, the root directory of a 40-megabyte fixed disk can have what maximum number of entries? 1. 128 2. 256 3. 512 4. 640 11-15. The DOS directory system is a file system that enables DOS to manage files. 1. True 2. False 11-17. In DOS, the maximum number of characters in a file extension is 1. one 2. two 3. three 4. four 11-18. When DOS is used on a personal computer, a directory entry is composed of how many bytes? 1. 32 2. 48 3. 64 4. 80 11-19. Which of the following parameters is NOT part of the DOS file allocation table (FAT) entry? 1. A bad cluster code written during formatting 2. A DOS cluster available for storage 3. The file name stored in that DOS cluster 4. An end of the file code 11-20. On a 5.25-inch floppy disk, which of the following materials is used as the magnetic coating? 1. Chromium dioxide 2. Iron oxide only 3. Cobalt only 4. Iron oxide or cobalt, depending on the density of the disk 11-21. The index hole on a 5.25-inch soft-sectored floppy disk is used to indicate the 1. start of sector 1 of each track 2. start of track 1 3. start of each sector 4. end of the data storage area of the disk 11-16. In DOS, the maximum number of characters in a file name is 1. 8 2. 9 3. 10 4. 11 75
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11-22. 11-23. 11-24. 11-25. 11-26. To protect a 5.25-inch floppy disk from being written on, which of the following actions should you take? 1. 2. 3. 4. Ensure the write enable notch is not obstructed Cover the write enable notch with a piece of tape Format the disk as read only Disable the write circuitry on the disk drive To allow for greater densities on a 3.5-inch floppy disk, the plastic cover provides what function, if any? 1. It stabilizes the disk as the disk spins 2. It makes it harder to damage the disk 3. It allows for greater disk speeds 4. None; it serves no function in increasing disk density When you handle a 3.5-inch floppy disk, what feature, if any, eliminates the need for you to keep the disk in a disk jacket? 1. 2. 3 4. The rigid plastic case The spring-loaded metal shutter The exposed media access hole None; you should always store a 3.5-inch disk in-a jacket What action, if any, is necessary to write data on a 3.5-inch disk? 1. 2. 3. 4. Ensure the write enable slide is positioned so you can see a hole in the disk case Ensure the write enable slide is positioned so that no hole is visible through the disk case Ensure the disk has not been formatted None; no action is necessary to write on a 3.5-inch disk The presence of a media indicator hole in a 3.5-inch disk case indicates what about the disk? 1. It has been properly inserted in the drive 2. It can be formatted as a 720K disk only 3. It can be formatted as a 1.44M disk 4. It has been preformatted 11-27. 11-28. 11-29. 11-30. 11-31. The drive motor in a 5.25-inch, 1.2M disk drive spins at what speed? 1. 200 rpm 2. 260 rpm 3. 300 rpm 4. 360 rpm The drive motor on most half-height floppy disk drives is what type of motors? 1. Gear box drive 2. Direct drive 3. Servo drive 4. Belt-drive To adjust the speed of some older full-height, belt-driven floppy disk drives, which of the following actions should you perform? 1. Replace the drive belt only 2. Observe the data on the floppy disk with an oscilloscope and adjust for maximum signal 3. Observe the drive speed frequency with an oscilloscope and adjust for proper speed 4. Observe the strobo-disk under a fluorescent light and adjust the speed until the strobo-disk spokes appear to be stationary Which of the following is NOT a function of the drive electronic circuit board? 1. To control the electromechanical parts of the disk drive 2. To control the operation of the read/write heads 3. To interface the disk drive to the computer 4. To interface the disk drive to the disk controller A 4-pin, in-line connector on the drive electronic circuit board of a floppy disk drive serves which of the following functions? 1. Provides power to the drive 2. Provides control signals to the drive 3. Transfers serial data from the heads to the. drive controller 4. Transfers serial data from the disk controller to the write head 76
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11-32. 11-33. 11-34. 11-35. 11-36. The head actuator assembly in a floppy disk drive has what purpose? 1. To retract the heads so the disk can be removed from the drive only 2. To move the heads to the proper position on the disk 3. To enable the write heads 4. To enable the read heads The two read/write heads in a floppy disk drive move independently of one another. 1. True 2. False Which of the following is a description of the construction of the read/write heads in a floppy disk drive? 1. 2. 3. 4. They are made of a hard ferrous material with electromagnetic coils for reading and writing They are made of a soft ferrous material with electromagnetic coils for reading and writing They are made of plastic with electromagnetic coils for reading and writing They are made of a hard ferrous material only and do not need any coils The write head is centered between two erase heads for which of the following reasons? 1. To erase the previous data before new data is written 2. To cancel the write current when a read operation is performed 3. To ensure that data being written does not spill over to adjacent tracks 4. To erase the previous data after the new data is written The number of tracks per inch that can be reliably written on a disk is called the 1. linear coercivity 2. longitudinal coercivity 3. linear density 4. longitudinal density 11-37. 11-38. 11-39. 11-40. 11-41. 11-42. The number of bits per inch that can be reliably written on a track is called the 1. linear coercivity 2. longitudinal coercivity 3. linear density 4. longitudinal density The strength of the magnetic field required to properly record data on a magnetic medium is referred to by which of the following terms? 1. Coercivity 2. Oersteds 3. Density 4. Ferrous Oersteds are used to make what type of measurements? 1. 2. 3. 4. Magnetic field strength Permeability of a ferrous material Magnetic density Magnetic polarity A 5.25-inch floppy disk that is labeled as DSDD has a maximum data capacity of 1. 180 kilobytes 2. 360 kilobytes 3. 720 kilobytes 4. 1.2 megabytes The track width of a 3.5-inch floppy disk is 1. 0.l15 mm 2. 0.16 mm 3. 0.33 mm 4. 0.45 mm Reading a 5.25-inch, 360K disk in a 1.2M disk drive will cause what problem, if any? 1. The disk drive will read the disk with massive read errors 2. The disk drive will be unable to read the disk at all 3. The 360K disk will not fit into a 1.2M disk drive 4. No problem; the disk drive will read the disk normally 77
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11-43. 11-44. Using a 1.2M, 5.25-inch drive to write data on a 5.25-inch, 360K disk that was originally created in a 360K disk drive will result in what problem, if any? 1. The 1.2M drive will not write on the 360K disk 2. The 360K disk will not fit into the 1.2M drive 3. The 1.2M drive will write a narrow track through the wider track on the 360K disk, which could result in read errors 4. None; no problem will be encountered Formatting a 5.25-inch, 360K DSDD disk as a 1.2M HD disk will result in what problem, if any? 1. The disk will not format because the DOS format program will check the media indicator on the disk and not permit the operation 2. The disk will appear to format correctly, but will be unreliable because of the increased write current required for high density disks 3. The disk will appear to format correctly, but will be unreliable because of the decreased write current required for high density disks 4. None; no problem will be encountered 11-45. Formatting a 720K DSDD, 3.5-inch floppy disk as a 1.44M will result in what problem, if any? 1. The disk will not format because the DOS format program will check the media indicator on the disk and not permit the operation 2. The disk will appear to format correctly, but will be unreliable because of the increased write current required for high density disks 3. The disk will appear to format correctly, but will be unreliable because of the decreased write current required for high density disks 4. None; no problem will be encountered 11-46. A high-density disk can be used in a low- density drive with no problems. 1. True 2. False 11.-47. 11-48. 11-49. 11-50. 11-51. The drive select jumper on a floppy disk drive’s electronics card is used to select which of the following functions? 1. Drive type 2. Drive density 3. Drive address 4. Drive operating speed When installing a floppy drive with a straight two-drive daisy chain cable, you should (a) connect Drive A to what connector and (b) set the drive select jumper to what drive? 1. (a) End (b) DS0 2. (a) End (b) DS1 3. (a) Middle (b) DS0 4. (a) Middle (b) DS1 The twist in a floppy disk cable was designed for which of the following reasons? 1. To ease floppy drive installation by setting all drives to DS1 2. To ease floppy drive installation by setting all drives to DS0 3. To ease floppy drive installation by setting drive A to DS0 and drive B to DS1 The twist in a floppy drive cable cross connects which of the following pins? 1. 10 through 16 only 2. 10 through 20 3. 20 through 26 only 4. 20 through 30 The terminating resistor on a floppy drive (a) is used to supply the proper load to what device and (b) should be connected on the floppy disk at what point on the cable? 1. (a) Computer (b) middle 2. (a) Computer (b) end 3. (a) Disk controller (b) middle 4. (a) Disk controller (b) end 78
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11-52. The media sensor detects a hole for which of the following disks? 1. 5.25-inch, 360K disks 2. 5.25-inch, 1.2M disks 3. 3.5-inch, 720K disks 4. 3.5-inch, 1.44M disks 11-53. It is impossible to recover data on a disk that has been damaged. 1. True 2. False 11-54. Large magnetic disk memory sets are generally used with which of the following computers? 1. Mainframe computers 2. Minicomputers 3. Personal computers only 4. Microcomputers 11-55. What is the diameter of most magnetic disk packs? 1. 10 inches 2. 12 inches 3. 14 inches 4. 16 inches 11-56. The top and bottom platters of most disk packs are used for which of the following functions? 1. To store data 2. To provide position data 3. Both 1 and 2 above 4. To provide protection to the pack 11-57. The servo surface of a disk pack is used for which of the following functions? 1. To control the movement of the read/write heads 2. To maintain alignment of the read/write heads over the proper track 3. Both 1 and 2 above 4. To provide additional data storage area 11-58. When the summing of dipole bits on the disk servo surface is equal to zero volts, which of the following conditions exists? 1. The heads are on an odd numbered track only 2. The heads are on an even numbered track only 3. The heads are between tracks 4. The heads are centered on a track 11-59. On a typical disk memory set’s operator panel, which of the following conditions is NOT indicated by the READY indicator? 1. The disk drive address 2. The disk is up to operating speed 3. The heads are properly loaded 4. No-fault conditions are present 11-60. On a disk memory set’s status/maintenance panel, a fault code of 5 indicates what fault condition? 1. Voltage fault 2. Seek error 3. Multiple heads selected fault 4. No heads selected fault 11-61. The FORMAT WRITE PROTECT switch on a disk memory unit’s status panel protects the disk from being inadvertently formatted by which of the following format commands? 1. Commands from the computer only 2. Commands from the status/maintenance panel only 3. Commands from the computer and the status/maintenance panel 11-62. The functions performed by the disk memory set’s controller microprocessor are governed by which of the following methods? 1. The firmware stored in a ROM 2. The software in the CDS computer 3. The firmware stored in the RAM 4. The software stored in the RAM 79
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11-63. 11-64. 11-65. 11-66. 11-67. The buffer memory in the disk memory set’s computer is used for which of the following functions? 1. 2. 3. 4. To prevent data from being read from the disk during a write operation To prevent data from being written on the disk during a read operation To prevent the loss of data during a reading or writing operation To hold the external function from the computer A disk memory set is capable of reading and writing data on the same disk at the same time. 1. True 2. False A single disk memory set controller is capable of controlling a total of how many drives? 1. One 2. Two 3. Three 4. Four In a disk memory set’s controller to disk drive interface, each drive is connected to the controller by which of the following means? 1. 2. 3. 4. A daisy chained A cable only A daisy chained B cable only Both a daisy chained A and a daisy chained B cable A daisy chained A cable and a unique B cable The A cable in a disk memory set’s controller-to- drive interface is used for which of the following functions? 1. 2. 3. 4. Interrupt signal processing only Send timing signals for read/write operations only Microprocessor control of the drives Data interface between the drive and controller 80 11-68. 11-69. 11-70. 11-71. 11-72. In a disk memory set, converting 16-bit parallel data into a serial NRZ pulse train is a function of which of the following areas? 1. Controller microprocessor 2. Controller buffer memory 3. Data bus control unit 4. Disk control logic In a disk memory set, the data bus control unit gives the highest priority to which of the following transfer requests? 1. Disk control logic and buffer memory 2. Processor input and output holding register 3. Input/output channel 4. Computer generated input data In a disk memory set, data is written on the disk using which of the following encoding methods? 1. 2. 3. 4. Phase encoding Non-return-to-zero Non-return-to-zero-indiscrete Modified frequency modulation What is the minimum speed required for the heads of a disk memory set to load? 1. 3,000 rpm 2. 3,100 rpm 3. 3,200 rpm 4. 3,600 rpm In a disk memory set, if the disk drive motor’s speed drops below 3,100, which of the following events will occur? 1. 2. 3. 4. The heads will crash into the disk The heads will automatically unload or retract The disk memory set will automatically turn off power The disk memory set will continue to operate normally
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11-73. 11-74. The speed of the drive motor in a disk memory set is sensed by which of the following devices? 1. A tachometer 2. A magnetic switch 3. An optical switch 4. A laser switch The static ground spring mounted on the lower end of the spindle assembly serves which of the following functions? 1. 2. 3. Protects the disk from a buildup of static electricity Provides power to the spindle Maintains proper pressure of the spindle and the disk Provides a static charge to the spindle 11-75. Which of the following assemblies are NOT part of the actuator assembly? 1. Carriage and voice coil assembly 2. Rail bracket assembly 3. Head/arm assemblies 4. Magnet assembly 4. 1 References to DOS refer to Microsoft® Disk Operating Systems (MS-DOS®). 81
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ASSIGNMENT 12 Textbook Assignment: “Magnetic Disk Storage”, chapter 10, pages 10-21 through 10-33; and “CD-ROM Storage”, chapter 11, pages 11-1 through 11-7. 12-1. 12-2. 12-3. 12-4. The velocity transducer in a disk memory set drive unit helps control the acceleration and deceleration of which of the following parts? 1. The drive motor 2. The spindle assembly 3. The carriage assembly 4. The operating frequency of the system clock The polarity and amplitude of the voltage induced into the velocity transducer coil by the transducer core indicate which of the following movement characteristics? 1. The speed the disk is rotating 2. The speed of the carriage assembly only 3. The direction of travel of the carriage assembly only 4. The speed and direction of the carriage assembly movement The servo circuit used to position the read/write heads in a disk memory set is centered on the right track when the error voltage is equal to 1. -1 volt 2. 0 volts 3. +1 volt 4. +5 volts The feedback signal in the velocity transducer servo circuit performs which of the following functions? 1. It is used to move the carriage faster 2. It tells the servo circuit when the desired location is reached 3. It opposes the position error and dampens carriage movement 4. It moves the heads by one track 12-5. 12-6. 12-7. 12-8. If a disk has an error on its servo surface, it is possible to rewrite the servo surface. 1. True 2. False The number of sectors per track that will be written on a disk memory set disk pack is selectable by what means, if any? 1. 2. 3. 4. The sector select switch only A set sector size command from the computer only Either the sector select switch or a set sector size command from the computer; the result is the same None; the number of sectors per track is fixed When a disk pack is formatted, the locations of the tracks are controlled by which of the following factors? 1. 2. 3. 4. The prerecorded tracks on the servo disk surface The smallest increment the actuator assembly can move the heads An operator controlled entry of number of tracks A computer command designating number of tracks per inch When a magnetic disk set is operating normally, what is the relationship, if any, between the position of the heads and the disk’s surface? 1. 2. 3. 4. The heads physically contact the disk The heads are held above the disk surface by the head arm springs The heads float above the surface of the disk on a cushion of air None; the position of the heads does not affect disk operation 82
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12-9. Which of the following actions will help prevent damage to the disk pack? 1. 2. 3. 4. Store the disk pack on its side Store the disk pack in an area where large magnetic fields exist Never reassemble the disk pack canister if it is empty Never touch the disk pack’s recording surfaces 12-10. The term “fixed hard disk system” refers to which of the following devices? 1. 2. 3. 4. A hard disk system that is not broken A hard disk system in which the disk is in a sealed case and inaccessible to the user A hard disk system in which the hard disk is contained in a removable cartridge A hard disk system that cannot be used with a microcomputer 12-11. The head disk assembly of a fixed disk system usually contains all of the following parts except which one? 1. The heads 2. The disk platters 3. The head actuator 4. The disk controller 12-12. What is the maximum number of platters that a half-height, fixed disk system may contain? 1. Five 2. Six 3. Seven 4. Eight 12-13. In the manufacture of a fixed hard disk, which of the following processes for applying the magnetic material is similar to the process used in creating semiconductors? 1. Sputtering 2. Platting 3. Electroplating 4. Coating 12-14. 12-15. 12-16. 12-17. 12-18. Which of the following materials is most commonly used as a base for fixed hard disk platters? 1. Polyester film 2. Aluminum alloy 3. Iron alloy 4. Plastic Having the thinnest magnetic media applied to the disk platters has which of the following advantages? 1. 2. 3. 4. A smaller space on the disk is required to reliably store data The head can fly closer to the disk A smaller magnetic field strength is required to reliably store data All of the above In a magnetic disk system, reducing the flying height of the heads has which of the following advantages? 1. 2. 3. 4. Requires a stronger current to accurately write on the disk Reduces the signal to noise ratio, increasing the accuracy of the disk Increases the signal to noise ratio, increasing the accuracy of the disk Increases the physical space on the disk required to store data The U-shaped groove in the bottom of a thin film head is used for what function? 1. 2. 3. 4. To regulate the air pressure and control the flying height of the head To direct the magnetic field from the head onto the disk when writing To channel the magnetic field from the disk to the head when reading To hold the erase head The mechanical system that moves the heads across the disk surface is known as the 1. head drive system 2. head arm 3. head actuator 4. disk drive motor 83
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12-19. A motor that moves imprecise detents when a drive signal is applied is known as a 1. voice coil motor 2. stepper motor 3. servo motor 4. synchro 12-20. Which of the following actuators could suffer a loss of data because of variations in temperature? 1. Voice coil 2. Stepper motor 3. Servo motor 4. Synchro 12-21. For proper positioning of the heads, which of the following actuators requires a dedicated servo surface or servo signal embedded in the sector gaps? 1. Voice coil 2. Stepper motor 3. Servo motor 4. Synchro 12-22. The speed of the spindle motor in a fixed disk is controlled by which of the following devices? 1. An optical sensor 2. A tachometer only 3. A feedback loop only 4. A tachometer and feedback loop 12-23. Timing and synchronization between a fixed disk drive and the drive controller are accomplished by which of the following means? 1. A clock on the controller 2. A clock on the disk drive logic board 3. Special timing signals on the disk 4. Data and flux reversal pulses 12-24. Which of the following data encoding methods is NOT used with fixed disk drives? 1. Modified frequency modulation 2. Frequency modulation 3. Run length limited 4. Non-return-to-zero indiscrete 12-25. A fixed disk system that uses frequency modulation to encode data will store the byte 1010 0001 as which of the following codes (P=pulse, N=no pulse)? 1. PPPPNPNPNPPPPPNP 2. PPPNPPPNPNPNPNPP 3. NPPPNPPPPPPPPPNP 4. NPNPNPNPNPNPNPNP 12-26. Which of the following data encoding methods groups bits together and uses a table to determine what code is written on the disk? 1. Non-return-to-zero 2. Frequency modulation 3. Modified frequency modulation 4. Run length limited 12-27. A fixed disk system using modified frequency modulation will encode a logic ZERO that is preceded by a logic ONE in which of the following ways? 1. No pulse followed by a pulse 2. A pulse followed by no pulse 3. Two no-pulse periods 4. Two pulses 12-28. Which of the following encoding methods will increase by 50 percent the data density and transfer rate of a fixed disk system? 1. Run length limited 2. Non-return-to-zero 3. Frequency modulation 4. Modified frequency modulation 12-29. The encoding method used to write data on a fixed disk is determined by which of the following means? 1. The application software installed in the computer 2. The disk operating system (DOS) installed in the computer 3. The disk controller 4. The manufacturer of the disk drive 84
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12-30. 12-31. 12-32. 12-33. 12-34. 12-35. The run length limited encoding method can be used with any fixed disk drive. 1. True 2. False A fixed disk’s interleave factor is the relationship between what two items? 1. The physical sectors and the logical sectors of a track 2. The disk drive and the disk controller 3. The disk drive and the encoding method used to store data 4. The disk drive and the computer Interleaving a fixed disk has which of the following effects? 1. Increases data density on the disk 2. Decreases data density on the disk 3. Increases data retrieval and transfer time 4. Decreases data retrieval and transfer time On a fixed disk with nine sectors per track and an interleave factor of 4:1, what is the physical sector numbering? 1. 1, 9, 7, 5, 3, 2, 8, 6, 4 2. 1, 8, 6, 4, 2, 9, 7, 5, 3 3. 1, 2, 3, 4, 5, 6, 7, 8, 9 4. 1, 4, 8, 3, 7, 2, 6, 5, 9 Which of the following interleave factors will provide the fastest data transfer rate? 1. 4:1 2. 3:1 3. 2:1 4. 1:1 Which of the following drive interfaces is a smart interface that can disconnect itself from the computer while it processes computer requests? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI 12-36. 12-37. 12-38. 12-39. 12-40. 12-41. Which of the following interfaces requires that a set-up program in the computer be run to describe the fixed disk drive’s characteristics? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI Which of the following interfaces has the data encoder/decoder on the controller card? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI Which of the following interfaces could damage a disk if a low-level format is attempted? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI Which of the following interfaces is actually a host adapter, capable of interfacing up to eight devices? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI Which of the following interfaces is capable of formatting a drive up to 60 sectors per track and can support a 1:1 interleave? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI Which of the following interfaces is manufactured on the motherboards of personal computers? 1. ST-506/412 2. IDE 3. ESDI 4. SCSI 85
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12-42. 12-43. 12-44. 12-45. Which of the following actions does the format program take while performing a low-level format on a fixed disk system? 1. Checks for bad tracks and marks them with a checksum code 2. Writes the sectors and tracks on the disk 3. Both 1 and 2 above 4. Divides the disk into DOS partitions Write precompensation helps eliminate data errors by what method, if any? 1. 2. 3. 4. Increasing the number of bytes per sector as the heads move toward the inner tracks of the disk Decreasing the number of bytes per sector as the heads move toward the inner tracks of the disk Changing the spacing of the magnetic fields as the heads move toward the inner tracks of the disk None; write precompensation does not help eliminate data errors Decreasing the amount of current used to write data on the inner tracks of the disk is known as 1. write precompensation 2. reduced write current 3. low-level disk format 4. disk partitioning Write precompensation and reduced write current are necessary for which of the following reasons? 1. 2. 3. 4. The inner tracks of the disk are larger than the outer tracks The inner tracks of the disk are smaller than the outer tracks The disk spins faster when reading the inner tracks The disk spins slower when reading the inner tracks 12-46. 12-47. 12-48. 12-49. 12-50. Runnmg the DOS FDISK program on a fixed disk in a personal computer performs which of the following functions? 1. Prepares the DOS boot sector on the disk 2. Creates the file allocation table on the disk 3. Writes the sectors on the disk 4. Creates the root directory When you erase a file on a disk in a personal computer, which of the following operations does DOS perform? 1. 2. 3. 4. Finds the file and writes all ZEROS to the sectors on the disk that the file occupied Finds the file and writes all ONES to the sectors on the disk that the file occupied Changes the code in the FAT to indicate that the clusters the file occupied are available for data storage Changes the code in the root directory to indicate that the file is erased A virus may only infect your personal computer if it loaded into which of the following types of files? 1. 2. 3. 4. A .COM or .EXE file only A data file only The master boot record only Any file loaded when doing a low-level disk format Which of the following viruses embeds itself into other programs and may contain other types of. viruses? 1. Worm 2. Trojan horse 3. Logic bomb Which of the following viruses tries to endlessly copy itself on a fixed disk, tying up the computer and eventually overloading the disk? 1. Worm 2. Trojan horse 3. Logic bomb 86
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12-51. 12-52. 12-53. 12-54. 12-55. 12-56. Which of the following viruses only executes itself if a certain set of conditions is met? 1. Worm 2. Trojan horse 3. Logic bomb Which of the following viruses is generally the most destructive to a system? 1. Worm 2. Trojan horse 3. Logic bomb Which of the following is NOT a precaution in preventing virus infections? 1. Making regular back-ups 2. Using only authorized software 3. Periodically checking the size of the COMMAND.COM file 4. Using software from an unauthorized source It is usually possible to recover some data from a fixed disk even after a severe head crash. 1. True 2. False In caring for a fixed disk, which of the following actions NOT recommended? 1. 2. 3. 4. Limit the number of times the system is turned on and off Avoid eating, drinking, and smoking around computer systems Clean the fixed disk on a regular basis Perform the low-level format of a fixed disk in the position and temperature that the disk will be used A multimedia CD-ROM is a disc that contains which of the following types of information? 1. 2. 3. 4. Data files only Digitized audio only Digitized video only Data files, digitized audio, and digitized video 12-57. 12-58. 12-59. 12-60. 12-61. Data is stored on a CD-ROM by which of the following methods? 1. Magnetizing spots on the disc 2. Etching tiny ones and zeros on the disc 3. Punching tiny holes through the disc 4. Etching pits between lands on the disc What is the diameter of a compact disc? 1. 120mm 2. 130 mm 3. 140 mm 4. 150 mm The data area of a CD-ROM consists of which of the following sections? 1. 2. 3. 4. The table of contents, the lead-out area, and the clamping area The table of contents and the program area only The table of contents, the program area, and the lead-out area The lead-out area and the clamping area CD-ROM storage has all of the following advantages except which one? 1. 2. 3. 4. Fast access time Storage capacity of over 540 megabytes of information Extremely durable Can store a mixture of digital information Data is stored on a CD-ROM disc in which of the following ways? 1. 2. 3. 4. In a series of separate tracks only In a series of separate tracks divided into sectors In a continuous spiral track divided into sectors In a continuous spiral sector divided into tracks 87
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12-62. 12-63. 12-64. 12-65. 12-66. Which of the following is a description of the operation of a drive that uses constant linear velocity? 1. 2. 3. 4. The speed of the disc decreases as the read head moves toward the outer edge of the disc The speed of the disc increases as the read head moves toward the outer edge of the disc The speed of the disc remains constant throughout the range of the read head The physical sizes of the sectors on the spiral track increase toward the outer edge of the disc Sectors on a CD-ROM are accessed by which of the following address forms? 1. Track:sector:head 2. Minute:second:sector 3. Hour:minute:sector 4. Cylinder:sector When a CD-ROM disc is manufactured, the data is written on the disc in which of the following formats? 1. Eight-to-fourteen modulation 2. Modified frequency modulation 3. Run length limited 2, 7 4. Non-return-to-zero The laser used in the optical head of a CD-ROM drive emits light in which of the following bands? 1. Ultraviolet 2. Visible spectrum 3. Infrared 4. White The collimating lens in a CD-ROM drive’s optical head is used to perform which of the following functions? 1. To focus the laser beam on the disc 2. To reduce the divergence of the laser beam 3. To focus the laser beam on the photodector circuit 4. To reduce the intensity of the laser beam 12-67. 12-68. 12-69. 12-70. 12-71. The final step in focusing the laser beam on the disc is accomplished by which of the following items? 1. Optical head 2. Objective lens 3. Collimating lens 4. Plastic coating on the disc Splitting the reflected laser beam and directing the split beams to a set of photodiodes is used in which of the following functions? 1. Ensuring the disc is rotating at the proper speed 2. Maintaining proper tracking and focus 3. Detecting data on the disc 4. Both 2 and 3 above The control section decodes the eight-to-fourteen data read from a disc using what method, if any? 1. 2. 3. 4. Checking the data for parity errors Using the data to address a ROM for the proper byte Adding the data to a set value to find the proper byte None; the data does not need to be decoded The turntable must rotate so that the data track passes over the optical head at what speed? 1. 1.3 meters per second 2. 1.5 meters per second 3. 1.7 meters per second 4. 1.9 meters per second The interface section provides control for which of the following functions? 1. 2. 3. 4. The transfer of data from the CD-ROM drive to the computer The receipt of data from the computer to be written on the disc Both 1 and 2 above The transfer of data from the disc to the control section of the drive 88
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12-72. Storing information on a large database on CD- ROM has which of the following advantages? 1. 2. 3. 4. Reduces the amount of paper storage required Enables the information to be quickly retrieved Allows the information to be quickly cross- referenced All of the above 12-73. In a multimedia or CD-I application, the different types of data are distinguished by which of the following methods? 1. 2. 3. 4. The control section analyzes the data to determine what it is All data is sent to the computer and the computer determines what it is A code is written at the start of each sector to identify the type of data The disc is divided into specific areas to store audio, video, and program information 89
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ASSIGNMENT 13 Textbook Assignment: “Printers,” chapter 12, pages 12-1 through 12-15; and “Data Conversion Devices and Switchboards,” chapter 13, pages 13-1 through 13-5. 13-1. Printers that use pins or hammers to strike an 13-2. 13-3. 13-4. inked ribbon to transfer characters to paper are classified as what type? 1. Impact 2. Nonimpact 3. Thermal 4. Laser A predefine table of characters that can be printed by a printer is known as the 1. print head 2. character set 3. printer code 4. character library The 8-bit printer codes that define the alphanumeric characters of the standard English alphabet are contained in which of the following character sets? 1. American National Standards Institute (ANSI) character set 2. Computer Institute character set 3. Institute of Electrical and Electronics Engineers (IEEE) standard character set 4. American National Standard Code for Information Interchange (ASCII) character set Standard printer character codes contain a total of how many data bits? 1. Five 2. Six 3. Seven 4. Eight 13-5. 13-6. 13-7. 13-8. 13-9. 90 The ASCII decimal value 66 represents which of the following characters? 1. A 2. a 3. B 4. b The ASCII decimal values 128 through 255 are used for which, if any, of the following characteristics or codes? 1. 2. 3. 4. Alternate character set Control codes Lowercase letters of the main character set None of the above; they are undefined and have no meaning The type of characters that a printer can print depends on which of the following factors? 1. The type of printer only 2. The software only 3. The type of printer and the software 4. The type of computer A printer driver is a software routine that performs which of the following functions? 1. 2. 3. 4. Defines the printer capabilities to the software Defines the character set to the printer Defines the graphics capability of the printer All of the above A separate printer driver is required for each type of printer that a software program will support. 1. True 2. False
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13-10. The original ASCII codes contained what total number of control codes? 1. 16 2. 32 3. 48 4. 54 13-11. Which of the following ASCII codes (in decimal) will result in the printer performing a carriage return? 1. 10 2. 12 3. 13 4. 27 13-12. The ASCII ESCAPE code (27) when combined with other characters and sent to a printer is used for which of the following functions? 1. To tell the printer to start printing 2. To initiate enhanced features of many printers 3. To stop all printer operations 4. To change the printer driver of the software 13-13. Printing each letter or character on a line based on the character’s actual size is known as which of the following printer spacing methods? 1. Proportional spacing 2. Prearranged spacing 3. Relative spacing 4. Fixed spacing 13-14. A font describes which of the following characteristics of the type? 1. Style of the typeface only 2. Size of the typeface only 3. Both the style and size of the typeface 4. All the characters a printer is capable of printing 13-15. The printer measure that is equal to 1/72 inch is known by what term? 13-16. Which of the following print modes is used to print text across the length of a standard size sheet of paper? 1. Landscape mode 2. Portrait mode 3. Picture mode 4. Graphics mode 13-17. What is the most widely used serial interface between a personal computer and a printer? 1. EIA interface 2. Centronics® interface 3. RS-232 interface 4. RS-323 interface 13-18. Parallel-to-serial data conversion for use in serial interfaces of personal computers is accomplished by which of the following circuits? 1. RS-232 interface 2. Universal asynchronous receiver/transmitter (UART) 3. Centronics interface 4. Serial converter 13-19. In a serial interface that uses software handshaking, what minimum number of pins must be connected? 1. Five 2. Two 3. Three 4. Four 13-20. The Centronics parallel interface uses what (a) connector at the computer end of the cable and (b) connector at the printer end of the cable? 1. (a) 36-pin Centronics (b) 36-pin Centronics 2. (a) 36-pin Centronics (b) DB-25 subminiature 3. (a) DB-25 subminiature (b) DB-25 subminiature 4. (a) DB-25 subminiature (b) 36-pin Centronics 1. Elite 2. Pica 3. Pitch 4. Point 91
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13-21. The Centronics parallel interface is which of the 13-22. 13-23. 13-24. 13-25. 13-26. following types of interface between the computer and the printer? 1. 8-bit, one-way 2. 8-bit, two-way 3. 16-bit, one-way 4. 16-bit, two-way Which of the following is NOT a function of the control panel on a printer? 1. Activating the print head 2. Providing operator selectable fonts 3. Initiating the self-test function 4. Controlling whether the printer is online or offline Continuous paper with perforated holes on each side is designed to be used with which of the following paper-feed methods? 1. Friction feed 2. Tractor feed 3. Sheet feeder 4. Pressure feed The paper-feed motor in a tractor-feed printer is usually what type of motor? 1. Stepper 2. Synchro 3. Servo 4. Reduction Which of the following paper-feed methods uses one or more pressure rollers to move paper through the printer? 1. Tractor feed 2. Friction feed 3. Sheet feeder 4. Both 2 and 3 above Which of the follow lists includes only impact printers? 1. Chain, band, and laser 2. Drum, dot matrix, and inkjet 3. Inkjet, laser, and daisy wheel 4. Chain, band, drum, dot matrix, and daisy wheel 13-27. 13-28. 13-29. 13-30. 13-31. 92 The maximum number of characters that a drum printer can print on one line is determined by which of the following factors? 1. The type of software being used 2. The number of rows on the drum 3. The number of columns on the drum 4. The type of computer being used A drum printer has which of the following numbers of hammers? 1. One for each column on the drum 2. One for each line the printer is capable of printing 3. One for each letter of the alphabet and seven for special characters 4. Two for each letter of the alphabet (one for uppercase and one for lowercase) and seven for special characters The quality of print produced by a dot matrix printer is directly related to which of the following factors? 1. The number of print wires in the print head 2. The number of characters being printed 3. The size of the print head 4. The type of font being printed The print wires in a dot matrix print head are driven by which of the following devices? 1. A relay 2. One solenoid that drives all the print wires 3. An individual solenoid for each print wire 4. A hi-stable multivibrator A dot matrix print head is mounted on a heat sink for 1. 2. 3. 4. which of the following reasons? To dissipate heat generated by the moving print wires To dissipate heat generated by the solenoid drivers To dissipate heat generated by the printer’s power supply To heat up the print wires to the proper operating temperature
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13-32. A nine-pin dot matrix print head prints in near letter quality mode by making two passes for each line, advancing the paper what distance before the second pass? 1. One-half line 2. One-half letter space 3. One-half dot space 4. One dot space 13-33. A 24-pin print head prints near letter quality faster and with greater resolution than a 9-pin print head for which of the following reasons? 1. It prints two characters at a time 2. It prints larger dots 3. It prints more dots per character only 4. It has two columns of offset print wires and prints smaller dots 13-34. The print head of a dot matrix printer is moved across the length of the platen by a wire, belt, or chain that is connected to which of the following devices? 1. Paper motor 2. Platen motor 3. Print head motor 4. Carriage motor 13-35. The daisy wheel printer has which of the following advantages over the dot matrix printer? 1. It prints letter quality 2. It can print carbon copies 3. Both 1 and 2 above 4. It prints faster than a dot matrix printer 13-36. The laser printer is what type of printer? 1. Electrostatic 2. Electrosensitive 3. Electrothermal 4. Impact 13-37. Laser printers are classified as what class of printer? 1. Character 2. Line 3. Daisy 4. Page 13-38. The photosensitive aluminum cylinder in a laser printer is known as the 1. primary corona 2. laser source 3. toner drum 4. print drum 13-39. The laser diode generates a single wavelength light in bursts of one-millionth of a second or less. 1. True 2. False 13-40. The erase lamps have which of the following effects on the print drum? 1. They apply a positive charge to the drum 2. They apply a negative charge to the drum 3. They neutralize any charge on the drum 4. They neutralize any toner on the drum 13-41. During a laser printer’s print cycle, a charge of -600V is applied to the print drum by what device? 1. Erase lamps 2. Primary corona wire 3. Secondary corona wire 4. Laser beam 13-42. The laser beam’s horizontal scan across the drum is developed by what device? 1. Rotating hexagon mirror 2. Laser diode carriage motor 3. Laser beam lens assembly 4. Laser beam shutter 13-43. What effect, if any, does the laser beam striking the print drum have on the print drum? 1. The area of the print drum becomes positively charged 2. The area of the print drum becomes negatively charged 3. Any charge on the print drum becomes neutralized 4. None 93
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13-44. The toner used in a laser printer consists of a fine powder containing metal, dyes, and 1. ink 2. sand 3. glass 4. plastic 13-45. As the print drum rotates past the toner reservoir, which of the following events occurs? 1. The excess toner on the drum is deposited into the reservoir 2. The toner is attracted to the positively charged areas of the drum 3. The toner is attracted to the negatively charged areas of the drum 4. The toner coats the entire drum 13-46. The transfer corona is used for which of the following functions? 1. It charges the toner to enable the toner to be transferred from the reservoir to the drum 2. It charges the drum to enable the toner to be transferred from the reservoir to the drum 3. It charges the drum to enable the transfer of toner from the drum to the paper 4. It charges the paper to enable the transfer of toner from the drum to the paper 13-47. The toner is permanently bonded to the paper by which of the following means? 1. The registration rollers apply pressure to the paper 2. The fusing rollers apply heat and pressure to the paper 3. The transfer corona applies heat to the paper 4. The primary corona applies heat to the paper 13-48. On a laser printer, a printout has blotches evenly spaced every 1.75 inches. This problem is probably caused by a defect in which of the following components? 1. Upper registration roller 2. Lower registration roller 3. Transfer roller 4. Lower fusing roller 13-49. A laser printer with a scratched print drum can be repaired by which of the following actions? 1. Removing the print drum and polishing the scratch out 2. Replacing the print drum only 3. Replacing the cartridge 4. Replacing the laser diode 13-50. To print a font using a Hewlett-Packard or compatible laser printer, the font definition bit map provides the printer with which of the following information? 1. Whereto place the dots to print the characters 2. Whereon the page to print the character 3. Whereon a line to print the character 4. Whereon the page to print graphic pictures 13-51. Soft fonts are font bit maps that are handled in which of the following ways? 1. They are loaded into the computer’s memory and transferred to the printer when needed 2. They are resident in the printer’s ROM 3. They are contained in ROM cartridges that plug into the computer 4. They are contained in RAM cartridges that plug into the printer 13-52. PostScript® printers are capable of printing a typeface in different sizes by using which of the following methods? 1. A different bit map for each size of character to be printed 2. A mathematical definition for each typeface and mathematically scaling the characters to the desired size 3. A mathematical definition for each size character 4. A bit map for one typeface that is mathematically scaled to change the size 13-53. Electrothermal printers use the heat of wires or pins to burn images onto plain paper. 1. True 2. False 94
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13-54. 13-55. 13-56. 13-57. Ink jet printers form images on the paper by which of the following methods? 1. 2. 3. 4. Spraying ink on the paper through a stencil to form the character Spraying ink on the paper with the print head moving to form each character Spraying ink on the paper in a series of dots to form the characters similar to those of a dot matrix printer Electrostatically charging the paper to attract the ink to the proper position to form the character The ink in an ink jet printer is sprayed onto the paper by which of the following methods? 1. 2. 3. 4. By using a pneumatic pump By using piezoelectric crystals to squeeze a nozzle tube By using small heaters to expand an air bubble and force the ink out of the nozzle Either 2 or 3 above, depending on the printer An analog signal has which of the following characteristics? 1. It varies continuously with time 2. Each bit position represents a portion of the overall quantity 3. The codes of ONEs and ZEROs indicate a value at a particular instant of time 4. The summation of the set bits is normally the quantity to be represented Analog signals representing analog quantities and binary numbers representing digital quantities have which of the following characteristics in common? 1. They both vary continuously with time 2. They both can express an infinitely large quantity 3. They both express values as a summation of set bits 4. They both express values within a given set of limits IN ANSWERING QUESTIONS 13-58 THROUGH 13-60, REFER TO FIGURE 13-1 ON PAGE 13-2 OF THE TEXT. 13-58. 13-59. 13-60. 13-61. 13-62. To indicate a range of values of 10 miles, what should the amplitude of the analog signal be, in volts peak to peak? 1. 7 2. 11 3. 12 4. 20 What should the digital quantity bit pattern contain to indicate a range of 12 miles? 1. 00011 2. 01100 3. 10010 4. 11000 To indicate a range of 25 miles, (a) the analog signal will be how many volts peak to peak while (b) the digital quantity bit pattern will contain what bit pattern? 1. (a) 25 (b) 11001 2. (a) 25 (b) 11100 3. (a) 27 (b) 11001 4. (a) 27 (b) 11100 The reference signal for an analog-to-digital conversion is normally equal to which of the following values? 1. The average value of the analog signal 2. The minimum value of the analog signal 3. The maximum value of the analog signal 4. The maximum value of the transmitted data In which of the following conversion operations is the input analog signal tested repeatedly over a period of time? 1. Encoding 2. Sampling 3. Decoding 4. Quantization 95
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13-63. 13-64. 13-65. 13-66. 13-67. 13-68. Which of the following conversion operations reduces the result of the conversion to a binary code acceptable to digital equipments? 1. Encoding 2. Sampling 3. Decoding 4. Quantization Which of the following conversion operations rounds out the conversion to the value of the LSB? 1. Encoding 2. Sampling 3. Decoding 4. Quantization Which of the following conversion operations is performed only when a conversion is required? 1. Encoding 2. Sampling 3. Decoding 4. Quantization In natural binary code, which of the following bit positions has the greatest weight or represents the largest value? 1. BAM 2. LSB 3. MSB Binary angular measurement uses what binary code? 1. Natural binary code 2. Hexadecimal 3. Gray code 4. BCD BAM data words are designed to indicate what maximum number of degrees of angular measurement? 1. 45 2. 90 3. 180 4. 360 13-69. 13-70. 13-71. 13-72. 13-73. When only the MSB of a BAM word used to transmit a non-angular value is set, what is the quantity indicated? 1. 2. 3. 4. The minimum value that can be transmitted The maximum value that can be transmitted One half of the minimum value that can be transmitted One-half of the maximum value that can be transmitted Binary-coded decimal uses what total number of bit positions to represent a single decimal digit? 1. One 2. Two 3. Eight 4. Four Which of the following binary codes is designed to change from one value to the next with only one bit change? 1. Hexadecimal 2. BCD 3. Gray code 4. Natural binary code A torque system has which of the following characteristics? 1. It provides a turning force to drive light loads 2. It provides an electrical output used to control the power that performs mechanical work 3. It is the combination of a synchro transmitter and synchro receivers 4. It is a variety of rotary, electromechanical, position sensing devices A synchro system has which of the following characteristics? 1. It provides a turning force to drive light loads 2. It provides an electrical output used to control the power that performs mechanical work 3. It is the combination of a synchro transmitter and synchro receivers 4. It is a variety of rotary, electromechanical, position sensing devices 96
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13-74. Which of the following is the primary characteristic of a control synchro system? 1. It provides a turning force to drive light loads 2. It provides an electrical output used to control the power that performs mechanical work 3. It is the combination of a synchro transmitter and synchro receivers 4. It is a variety of rotary, electromechanical, position sensing devices 13-75. The term “synchro” has which of the following meanings? 1. It provides a turning force to drive light loads 2. It provides an electrical output used to control the power that performs mechanical work 3. It is the combination of a synchro transmitter and synchro receivers 4. It is a variety of rotary, electromechanical, position sensing devices 97
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ASSIGNMENT 14 Textbook Assignment: “Data Conversion Devices and Switchboards,” chapter 13, pages 13-5 through 13-41. IN ANSWERING QUESTIONS 14-1 THROUGH 14-4, SELECT FROM THE FOLLOWING LIST THE SYNCHRO SYSTEM DESCRIBED BY THE QUESTION. ANSWERS MAY BE USED MORE THAN ONCE. 14-1. 14-2. 14-3. 14-4. 14-5. 14-6. 1. Single-speed synchro 2. Multispeed synchro 3. Dual-speed synchro Allows for a coarse value and a fine value to be sent at the same time. Uses more than one speed of data transmission. Uses a single synchro transmitter to transmit the entire range of data. Is the least accurate synchro system. In a dual-speed synchro system, which of the following values is/are sent by the synchro with (a) the highest ratio and (b) the lowest ratio? 1. (a) Coarse only (b) Fine only 2. (a) Fine only (b) Coarse only 3. (a) Coarse only (b) Fine and coarse 4. (a) Fine and coarse (b) Fine and coarse At any instant, the amplitude and polarity of the stator voltages, when compared to the supply or reference voltage, indicate the angular position of the rotor. 1. True 2. False 14-7. The sector conversion method divides the 360° of rotation into what total number of sectors? 1. 6 2. 8 3. 45 4. 60 IN ANSWERING QUESTIONS 14-8 AND 14-9, REFER TO TABLE 13-2 ON PAGE 13-7 OF THE TEXT. 14-8. 14-9. 14-10. 98 When the stator voltages S1 and S3 are in phase with the reference and S2 is out of phase, what sector is selected? 1. 30° to 90° 2. 90° to 150° 3. 150° to 210° 4. 330° to 30° When the stator voltages S1 and S2 are in phase with the reference and S3 is out of phase, what sector is selected? 1. 30° to 90° 2. 90° to 150° 3. 150° to 210° 4. 270° to 330° What is the total number of stator voltages required to determine the ratio angle once the sector has been determined? 1. One 2. Two 3. Three 4. Four
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14-11. During the octant conversion process, the 14-12. 14-13. 14-14. 14-15. 45-degree octant is determined by which of the following means? 1. The polarity and amplitude of two of the stator voltages 2. The polarity and amplitude of the sine and cosine voltages 3. The phase difference between two of the stator voltages 4. The phase difference between the sine and cosine voltages Once the octant has been determined during the octant conversion process, the remaining bit positions of the BAM word are determined by a trial and error approximation of a test binary angle against a ratio angle. 1. True 2. False How many synchro-to-digital conversions are required to generate a single BAM word from a dual-speed synchro input? 1. One 2. Two 3. Eight 4. Four Linear signals normally represent a quantity based on which of the following characteristics? 1. Signal amplitude 2. Signal frequency 3. Signal phase relationship 4. All of the above Scalar or resolver outputs are composed of which of the following signals? 1. A single linear waveform 2. A single waveform representing the sine of an angle 3. A single waveform representing the cosine of an angle 4. Two waveforms representing the sine and cosine of an angle 14-16. 14-17. 14-18. 14-19. 14-20. 14-21. The binary input to digital-to-analog converters is normally in which of the following binary forms? 1. Binary-coded decimal 2. Gray code 3. Binary angular measurement word 4. Natural binary A single digital-to-analog converter outputs what maximum number of proportional voltage signals? 1. One 2. Two 3. Three 4. Four What maximum number of DACs can be mounted on a mounting base? 1. One 2. Two 3. Three 4. Four Which of the following functions is/are performed by the BASE? 1. Selects the DAC operating mode 2. Provides all electrical interfaces for the DACs 3. Provides simulated digital data for test purposes 4. All of the above Each channel of a DAC can output which of the following signals? 1. Two linear voltages 2. A single-speed synchro 3. A sine/cosine resolver 4. All of the above, depending on the operational mode selected Which of the following functions is NOT performed by the EF and control address words? 1. 2. 3. 4. Master clear the DAC Initiate RDUC operations Set the individual DAC’s control address Define the control address of the DAC to receive the data words 99
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14-22. What is the maximum number of data words that can be sent in an output buffer to the DAC/BASE? 1. 8 2. 10 3. 12 4. 16 14-23. Individual DAC channels are identified by what code? 1. The A channel code 2. The B channel code 3. The data address code 4. The control address code IN ANSWERING QUESTIONS 14-24 THROUGH 14-27, SELECT FROM THE FOLLOWING LIST THE FUNCTIONAL SECTION OF THE DAC FUNCTION DESCRIBED IN THE QUESTION. ANSWERS MAY BE USED MORE THAN ONCE. 14-24. 14-25. 14-26. 14-27. 14-28. 1. Analog section 2. Digital section 3. Power supply section Generates the ODR signal to the computer to start the data word processing. Contains resistive ladder networks. Provides five regulated dc voltages. Converts the output of the holding registers to proportional voltages. Which of the following DAC sub-channels outputs the SINE waveform when in the TRIG mode? 1. A 2. B 3. A1 4. A2 14-29. 14-30. Which of the following DAC sub-channels outputs linear waveforms when in the LINEAR mode? 1. A 2. A1 only 3. A2 only 4. A1 and A2 Which of the following BASE controls allows for the selection of simulated test data from the BASE switches? 1. Mode control 2. Digital input 3. Channel A mode 4. Channel A data address 14-31. The selection of synchro or resolver output is performed by which of the following DAC/BASE controls? 1. Mode control only 2. Channel A mode only 3. Both mode control and channel A mode 4. Channel A data address 14-32. The digital-to-synchro converter in the DAC 14-33, 14-34. converts BAM data words to which of the following types of outputs? 1. Linear voltages 2. Sine and cosine voltages 3. Dual-speed synchro signals 4. Single-speed synchro signals The KCMX can accept demand digital from what maximum number of devices? 1. 8 2. 16 3. 24 4. 32 Multiplexing data converters allow the CDS computer to communicate with a variety of analog and digital equipments. 1. True 2. False 100
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IN ANSWERING QUESTIONS 14-35 THROUGH 14-37, SELECT FROM THE FOLLOWING LIST THE DEMAND DIGITAL CONTROL SIGNAL FOR THE FUNCTION DESCRIBED IN THE QUESTION. NOT ALL ANSWERS ARE USED. 1. Enter signal 2. Read signal 3. Error signal 4. Demand digital interrupt 14-35. A program controlled function signal. 14-36. Generated when a data entry device has input ready for transmission to the controlling computer. 14-37. Activates the DD device data lines. 14-38. The KCMX can accept ready digital data from what maximum number of inputs? 1. 8 2. 16 3. 24 4. 32 14-39. The KCMX is capable of communicating with digital devices over what total number of DIC/DOC channels? 1. One 2. Two 3. Three 4. Four 14-40. The KCMX can receive what maximum number of status signals? 1. 60 2. 45 3. 30 4. 15 14-41. On KCMX ready analog inputs, which of the following types of conversion is performed? 14-42. 14-43. 14-44. 14-45 14-46 The KCMX uses what maximum number of reference voltages to perform synchro-to-digital conversions on ready analog inputs? 1. 8 2. 12 3. 16 4. 20 The computer input data register is located on which of the following KCMX panels? 1. A1 2. A2 3. A3 4. A4 The DD/DDI select ON/OFF switches on the KCMX perform which of the following functions? 1. They identify the group mode 2. They indicate if an ENTER signal is on the line 3. They enable or disable the individual device DDI enter signals 4. All of the above Which of the following KCMX controls/ indicators indicates the status of individual external signals? 1. Data register 2. Output register 3. Control output register 4. Computer input data register DOC equipment output data maybe viewed using which of the following registers? 1. 2. 3. 4. Data register Output register Control output register Computer input data register 1. Digital-to-linear 2. Digital-to-synchro 3. Linear-to-digital 4. Synchro-to-digital 101
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14-47. 14-48. 14-49. 14-50. 14-51. Which of the following duplex controls/ indicators is/are lighted to indicate that computer A is in control of the KCMX and has received an input data request from computer A? 1. The A ODR 2. The A IDR only 3. The A IN CONTROL only 4. Both the A IDR and the A IN CONTROL Which of the following MODE SELECT switch positions enables the KCMX to simulate computer operations by use of the front panel controls? 1. DOC 2. MANUAL 3. NORM 4. A/D CONV Which of the following KCMX pushbuttons is used to reset all logic circuits? 1. BFE 2. DATA 3. MASTER CLEAR 4. ADDRESS CLEAR Which of the following KCMX indicators maybe used to display the starting address of a set of addresses to be interrogated in test mode? 1. INTERRUPTS 2. FINAL ADDRESS 3. ADDRESS CLEAR 4. CURRENT ADDRESS Which of the following operations is indicated by a lighted CONTROL CHANNEL indicator? 1. A simulated DOC input 2. An external function 3. The KCMX is in test mode 4. A control word transfer 14-52. 14-53. 14-54. 14-55. 14-56. 14-57. When address 77 is detected in the FINAL ADDRESS, which of the following interrupt indicators is lighted? 1. ID ERR 2. DIC REQ 3. ILL ADR 4. Each of the above When the KCMX has granted control to computer A or B, which of the following KCMX indicators is lighted? 1. DATA 2. INCONTROL 3. EOC ENABLE 4. COMPUTER ACKNOWLEDGE When in the DIC computer mode, the DIC channel EF/INT and OA/IDR indicators light for interrupts and input data requests. 1. True 2. False Which of the following positions should the SELECTOR switch be into simulate a 120-degree angle? 1. 1 2. 2 3. 3 4. 4 On digital switchboards, what is the minimum number of manual switches required for each I/O device or computer channel? 1. One 2. Two 3. Three 4. Four Control signals used to initiate switching action are generated by which of the following devices? 1. DFCS only 2. CSCP only 3. Both DFCS and CSCP 102
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14-58. 14-59. 14-60. 14-61. 14-62. 14-63. Each DFCS section contains what maximum number of switch panels? 1. 12 2. 18 3. 24 4. 32 Linear movement switch panels contain assemblies that can be switched to which of the following number of positions? 1. Six 2. Five only 3. Three only 4. Either three or five, depending on the type of assembly The switch control and potential transformer ACO assembly is used to provide voltages for bench testing which of the following DFCS panels? 1. Relay tester assemblies 2. Power distribution panels 3. Linear movement switches 4. All of the above What color CSCP pushbutton/indicator (PBI) will be lighted when the associated DFCS linear slide switch is in the ALTERNATE position? 1. Red 2. White 3. Green 4. Yellow What color CSCP PBI will be lighted when the associated DFCS linear slide switch is in the OFF position? 1. Red 2. White 3. Green 4. Yellow The DFCS can be controlled from two or more CSCPs at the same time. 1. True 2. False 14-64, 14-65. Ship’s cables are identified by which of the following markings? 1. Wire number 2. Cable type only 3. Cable group number only 4. Cable type and group number A ship’s wire has a plastic number with the following markings” “65 PD 632.” The number 632 indicates what designation? 1. Cable number 2. Function number 3. Circuit designator 4. Assigned wire number 14-66. Which of the following designations maybe used to identify a CSCP 85-pin connector? 1. JA 2. JB 3. JK 4. JP 14-67. Each analog switchboard section contains what maximum number of panels? 1. 2 2. 12 3. 24 4. 36 IN ANSWERING QUESTIONS 14-68 THROUGH 14-72, SELECT FROM THE FOLLOWING LIST THE ANALOG SWITCHBOARD PANEL WHOSE FUNCTION IS DESCRIBED IN THE QUESTION. ANSWERS MAY BE USED MORE THAN ONCE. 1. 2. 3. 4. Indicator panel assembly Fuse panel assembly Meter panel assembly Flasher panel assembly 14-68. Contains overflow fuses for associated switch panels. 14-69. Monitors ac or dc power busses. 14-70. Uses a motor driven cam to open or close control or status signal circuits. 103
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14-71. 14-72. 14-73. 14-74. Provides a visual indication of the active power being supplied to the switchboard. Indicates a warning or emergency condition. Which of the following switches are used to connect shipboard power supplies to the switchboard power busses? 1. Snap switches 2. Linear slide switches 3. Manually operated JR switches 4. Remotely operated JR switches What type of switches are found in a remotely operated JR switch assembly? 1. JR 2. AJR 3. Snap 4. Linear movement 104 14-75. When a control signal is fed back to the KCMX as a status signal input by the switchboard for test purposes, the switchboard is in which of the following configurations? 1. OFF 2. EAT 3. NORMAL 4. ALTERNATE